TSMC holds its earnings call today, with tightness at its 3nm node coming into focus as the foundry giant outlines new plans to expand N3 capacity. Its Chairman and CEO C.C. Wei says that, historically, TSMC does not add capacity once a node reaches its target level; however, in response to strong AI-driven demand from customers, the company is increasing its capex to expand N3 capacity.

Wei says the company is executing a global capacity plan to support robust multi-year demand for 3-nanometer technologies, which are used across smartphones, HPC, AI (including HBM base dies), automotive, and IoT applications.

In Taiwan, TSMC plans to add a new 3nm fab to its GigaFab cluster in Tainan Science Park, with volume production scheduled for the first half of 2027.

In Arizona, its second fab will also adopt 3nm technologies. Construction has already been completed, and volume production is set to begin in the second half of 2027, as Wei highlights.

In Japan, TSMC plans to deploy 3nm technologies at its second fab, with volume production scheduled for 2028.

Aside from these new fabs, TSMC will continue converting 5nm tools to support 3nm capacity in Taiwan. The company is also focusing on capacity optimization across nodes, including flexible support among N7, N5, and N3, emphasizing that it will maximize support for customers across all platforms amid tight supply.

N2 Ramp Gains Momentum with Long-Term Platform Outlook

As for its N2 capacity expansion plan, Wei notes that the node has already entered high-volume manufacturing in the fourth quarter of 2025 with solid yield performance. N2 is ramping in multiple phases at both the Hsinchu and Kaohsiung sites in Taiwan, as the company prioritizes domestic land to support the rapid ramp of its newest nodes, given the need for close integration with R&D operations. Looking ahead, TSMC expects continued enhancements to the node, including N2P and A16, positioning the N2 family as another large and long-lasting platform for the company.

A14 Takes Shape as TSMC’s Next Leap Forward

Looking ahead to its next-generation technologies, TSMC also highlights its A14 node during the earnings call. Wei notes that A14 technology development is progressing well and remains on track, with volume production scheduled for 2028.

According to Wei, the node will feature a second-generation nanosheet transistor structure, delivering a full-node advancement from N2 with improved performance and power efficiency to meet the growing demand for high-performance, energy-efficient computing. Compared with N2, A14 will deliver a 10% to 15% speed improvement at the same power, or a 25% to 30% reduction in power at the same speed, along with close to a 20% increase in chip density, Wei states.

The company expects A14 and its derivatives to further extend its technology leadership, noting strong customer interest and engagement from both smartphone and HPC applications, Wei adds.

Beyond technology roadmap updates, TSMC also addresses the financial implications of its global expansion strategy. TSMC CFO Wendell Huang states that as overseas fabs come online, they will initially dilute gross margins by around 2% to 3%. As capacity scales, the impact could widen to 3% to 4%. Overall, according to TechNews, TSMC’s overseas expansion strategy has shifted from a focus on cost and efficiency to a dual approach of local-for-local supply and geopolitical risk diversification.

Read more

• [News] TSMC Sees 2Q Sales Up 10% QoQ to $40.2B; Margins Rise to 65.5%–67.5%, Capex at Top End of $52–56B
• [News] TSMC 1Q26 Net Income Soars 58% YoY to NT$572.5B Record, EPS NT$22.08; Gross Margin Beats Forecast at 66.2%

(Photo credit: TSMC)

Please note that this article cites information from TSMC and TechNews.