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This paper presents NPUMoE, a runtime inference engine that accelerates MoE execution on Apple Silicon by offloading dense, static computation to NPU, while preserving a CPU/GPU fallback path for dynamic operations. NPUMoE uses offline calibration to estimate expert capacity and popularity that drives three key techniques: (1) Static tiers for expert capacity to address dynamic expert routing (2) Grouped expert execution to mitigate NPU concurrency limits (3) Load-aware expert compute graph residency to reduce CPU-NPU synchronization overhead. Experiments on Apple M-series devices using three representative MoE LLMs and four long-context workloads show that NPUMoE consistently outperforms baselines, reducing latency by 1.32x-5.55x, improving energy efficiency by 1.81x-7.37x, and reducing CPU-cycle usage by 1.78x-5.54x through effective NPU offloading.
| Subjects: | Machine Learning (cs.LG) |
| Cite as: | arXiv:2604.18788 [cs.LG] |
| (or arXiv:2604.18788v1 [cs.LG] for this version) | |
| https://doi.org/10.48550/arXiv.2604.18788 arXiv-issued DOI via DataCite (pending registration) |
From: Afsara Benazir [view email]
[v1]
Mon, 20 Apr 2026 19:52:56 UTC (6,797 KB)
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