A new family of error-correction codes developed by Finnish quantum computer maker IQM can reduce qubit overhead by a thousandfold, new research has shown. The improvement requires no new hardware and makes fault-tolerant computing possible in the near future.
Quantum computers are the widely regarded as the future of computing. However, the very quantum bits or qubits that make them powerful are also sensitive to noise, inducing errors in the computations. For quantum computers to become mainstream, error correction needs to be reliable and inexpensive.
Finland-headquartered IQM is one of the world’s leading authorities on superconducting quantum computers. The company has 23 quantum systems installed at research institutes, enterprises, and high-performance computing centers and understands the need and urgency for fault-tolerant quantum computers.
“At IQM, we have always believed that building production-grade quantum systems and advancing the underlying science are two sides of the same mission,” said Inés de Vega, Chief Scientist of IQM in a press release.
“Quantum error-correction codes should not only be highly efficient; they should also be implementable on scalable and manufacturable hardware architectures. A close co-design of quantum error correction and hardware is a central element of IQM’s strategy,” added Vega.
Working with researchers at the Freie Universität Berlin, the University of Edinburgh, and Johannes Gutenberg-Universität Mainz, IQM has developed a new family of error correction called directional tile codes, addressing major hurdles in quantum error correction.
“We have been working on tile codes since 2025, as they are promising candidates due to their local checks, great parameters, and the many ways that exist to perform logical computation with them without adding connectivity requirements,” explained Vincent Steffan, Senior Quantum Error-Correction Engineer at IQM.
When directional tile codes were deployed on IQM’s Crystal processors, alongside nearest-neighbor iSWAP gates that IQM already uses, the researchers found that the per-logical per-round error rate was reduced by a thousandfold when compared to surfaces that are used widely.
These comparisons were made at a hardware footprint of around 30 physical qubits for a logical qubit. “This is a significant step toward scalable fault-tolerant quantum computing,” said Vega in the press release. The approach represents a concrete step towards fault tolerance using Quantum Low-Density Parity Check (QLDPC) codes on planar hardware that IQM uses.
“The key innovation of directional tile codes is that we are using dynamic syndrome extraction circuits to implement them on a square grid,” added Steffan. The directional tile codes are relevant for IQM as it works to improve its near-term quantum error correction capabilities, while also setting a baseline for further improvements.
IQM is working to make fault-tolerant computing a reality by 2030 and wants to scale up to a million qubits. As the company prepares for a Nasdaq listing, it recognizes research as a core pillar of its technology roadmap.
“Close collaboration with leading academic groups is central to that approach, and this result demonstrates what such partnerships can achieve,” Vega also said in the press release.
The research findings were published on the preprint server, arXiv.
Ameya is a science writer based in Hyderabad, India. A Molecular Biologist at heart, he traded the micropipette to write about science during the pandemic and does not want to go back. He likes to write about genetics, microbes, technology, and public policy.
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