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MPCS: Neuroplastic Continual Learning via Multi-Component Plasticity and Topology-Aware EWC Combining Trained Models in Reinforcement Learning Training Non-Differentiable Networks via Optimal Transport ShiftLIF: Efficient Multi-Level Spiking Neurons with Power-of-Two Quantization Probe-Geometry Alignment: Erasing the Cross-Sequence Memorization Signature Below Chance Benchmarking local Hebbian learning rules for memory storage and prototype extraction Robust volatility updates for Hierarchical Gaussian Filtering Spiking Sequence Machines and Transformers Affinity Is Not Enough: Recovering the Free Energy Principle in Mixture-of-Experts Scalable Learning in Structured Recurrent Spiking Neural Networks without Backpropagation Geometric and dynamical analysis of attractor boundaries and storage limits in kernel Hopfield networks Attractor FCM Physical Foundation Models: Fixed hardware implementations of large-scale neural networks When Does Structure Matter in Continual Learning? Dimensionality Controls When Modularity Shapes Representational Geometry Learning to Forget: Continual Learning with Adaptive Weight Decay Causal Learning with Neural Assemblies NORACL: Neurogenesis for Oracle-free Resource-Adaptive Continual Learning Text-Utilization for Encoder-dominated Speech Recognition Models EdgeSpike: Spiking Neural Networks for Low-Power Autonomous Sensing in Edge IoT Architectures EvoTSC: Evolving Feature Learning Models for Time Series Classification via Genetic Programming Analysis and Explainability of LLMs Via Evolutionary Methods Deployment-Aligned Low-Precision Neural Architecture Search for Spaceborne Edge AI SeaEvo: Advancing Algorithm Discovery with Strategy Space Evolution Primitive Recursion without Composition: Dynamical Characterizations, from Neural Networks to Polynomial ODEs MAEO: Multiobjective Animorphic Ensemble Optimization for Scalable Large-scale Engineering Applications Necessary and sufficient conditions for universality of Kolmogorov-Arnold networks Learn&Drop: Fast Learning of CNNs based on Layer Dropping Architecture-Induced Recoverability Bias in Differentiable Symbolic Regression Collocation-based Robust Physics Informed Neural Networks for time-dependent simulations of pollution propagation under thermal inversion conditions on Spitsbergen Structure-Guided Diffusion Model for EEG-Based Visual Cognition Reconstruction
MicronNet: A Highly Compact Deep Convolutional Neural Net...
Alexander Wong, Mohammad Javad Shafiee, Michael St. Jules · 2018-03-28 · via cs.NE updates on arXiv.org

Traffic sign recognition is a very important computer vision task for a number of real-world applications such as intelligent transportation surveillance and analysis. While deep neural networks have been demonstrated in recent years to provide state-of-the-art performance traffic sign recognition, a key challenge for enabling the widespread deployment of deep neural networks for embedded traffic sign recognition is the high computational and memory requirements of such networks. As a consequence, there are significant benefits in investigating compact deep neural network architectures for traffic sign recognition that are better suited for embedded devices. In this paper, we introduce MicronNet, a highly compact deep convolutional neural network for real-time embedded traffic sign recognition designed based on macroarchitecture design principles (e.g., spectral macroarchitecture augmentation, parameter precision optimization, etc.) as well as numerical microarchitecture optimization strategies. The resulting overall architecture of MicronNet is thus designed with as few parameters and computations as possible while maintaining recognition performance, leading to optimized information density of the proposed network. The resulting MicronNet possesses a model size of just ~1MB and ~510,000 parameters (~27x fewer parameters than state-of-the-art) while still achieving a human performance level top-1 accuracy of 98.9% on the German traffic sign recognition benchmark. Furthermore, MicronNet requires just ~10 million multiply-accumulate operations to perform inference, and has a time-to-compute of just 32.19 ms on a Cortex-A53 high efficiency processor. These experimental results show that highly compact, optimized deep neural network architectures can be designed for real-time traffic sign recognition that are well-suited for embedded scenarios.