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cs.CR updates on arXiv.org

Agentic Vulnerability Reasoning on Windows COM Binaries From Beats to Breaches:How Offensive AI Infers Sensitive User Information from Playlists Undetectable Backdoors in Model Parameters: Hiding Sparse Secrets in High Dimensions When Embedding-Based Defenses Fail: Rethinking Safety in LLM-Based Multi-Agent Systems Token-Efficient Change Detection in LLM APIs Selfie-Capture Dynamics as an Auxiliary Signal Against Deepfakes and Injection Attacks for Mobile Identity Verification Trident: Improving Malware Detection with LLMs and Behavioral Features When Alignment Isn't Enough: Response-Path Attacks on LLM Agents RefusalGuard: Geometry-Preserving Fine-Tuning for Safety in LLMs Checkerboard: A Simple, Effective, Efficient and Learning-free Clean Label Backdoor Attack with Low Poisoning Budget Block-wise Codeword Embedding for Reliable Multi-bit Text Watermarking Secret Stealing Attacks on Local LLM Fine-Tuning through Supply-Chain Model Code Backdoors Enhancing Linux Privilege Escalation Attack Capabilities of Local LLM Agents Defusing the Trigger: Plug-and-Play Defense for Backdoored LLMs via Tail-Risk Intrinsic Geometric Smoothing Evaluating Jailbreaking Vulnerabilities in LLMs Deployed as Assistants for Smart Grid Operations: A Benchmark Against NERC Standards Behavioral Canaries: Auditing Private Retrieved Context Usage in RL Fine-Tuning FlexServe: A Fast and Secure LLM Serving System for Mobile Devices with Flexible Resource Isolation Breaking MCP with Function Hijacking Attacks: Novel Threats for Function Calling and Agentic Models Text Steganography with Dynamic Codebook and Multimodal Large Language Model An AI Agent Execution Environment to Safeguard User Data TwoHamsters: Benchmarking Multi-Concept Compositional Unsafety in Text-to-Image Models Fundamental Limitations of Favorable Privacy-Utility Guarantees for DP-SGD Symbolic Guardrails for Domain-Specific Agents: Stronger Safety and Security Guarantees Without Sacrificing Utility Hardening x402: PII-Safe Agentic Payments via Pre-Execution Metadata Filtering QShield: Securing Neural Networks Against Adversarial Attacks using Quantum Circuits Hijacking Text Heritage: Hiding the Human Signature through Homoglyphic Substitution Like a Hammer, It Can Build, It Can Break: Large Language Model Uses, Perceptions, and Adoption in Cybersecurity Operations on Reddit Private Seeds, Public LLMs: Realistic and Privacy-Preserving Synthetic Data Generation One Word at a Time: Incremental Completion Decomposition Breaks LLM Safety Measuring and Exploiting Contextual Bias in LLM-Assisted Security Code Review
Hardware-assisted Trusted Memory Disaggregation for Secur...
Taekyung Heo, Seunghyo Kang, Sanghyeon Lee, Soojin Hwang, Jaehyu · 2021-08-26 · via cs.CR updates on arXiv.org

Memory disaggregation provides efficient memory utilization across network-connected systems. It allows a node to use part of memory in remote nodes in the same cluster. Recent studies have improved RDMA-based memory disaggregation systems, supporting lower latency and higher bandwidth than the prior generation of disaggregated memory. However, the current disaggregated memory systems manage remote memory only at coarse granularity due to the limitation of the access validation mechanism of RDMA. In such systems, to support fine-grained remote page allocation, the trustworthiness of all participating systems needs to be assumed, and thus a security breach in a node can propagate to the entire cluster. From the security perspective, the memory-providing node must protect its memory from memory-requesting nodes. On the other hand, the memory-requesting node requires the confidentiality and integrity protection of its memory contents even if they are stored in remote nodes. To address the weak isolation support in the current system, this study proposes a novel hardware-assisted memory disaggregation system. Based on the security features of FPGA, the logic in each per-node FPGA board provides a secure memory disaggregation engine. With its own networks, a set of FPGA-based engines form a trusted memory disaggregation system, which is isolated from the privileged software of each participating node. The secure memory disaggregation system allows fine-grained memory management in memory-providing nodes, while the access validation is guaranteed with the hardware-hardened mechanism. In addition, the proposed system hides the memory access patterns observable from remote nodes, supporting obliviousness. Our evaluation with FPGA implementation shows that such fine-grained secure disaggregated memory is feasible with comparable performance to the latest software-based techniques.