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By Brian Tristam Williams
SiFive has raised $400 million in an oversubscribed Series G round as it steps up its push into datacentre CPU IP, with Atreides Management leading the round and Nvidia among the investors. The financing values the Santa Clara company at $3.65 billion and, according to Reuters, CEO Patrick Little sees it as potentially the company’s last private round before an IPO.
The company said the new capital will be used to accelerate next-generation datacentre designs, expand engineering teams and deepen the software stack around its CPU platform. In the Series G announcement, SiFive pointed to three areas for spending: high-performance scalar, vector and matrix RISC-V IP, software work building on existing CUDA, Red Hat and Ubuntu ports, and customer enablement tied to deployments such as its NVLink Fusion collaboration with Nvidia.
That is a more ambitious target than simply licensing cores into embedded and edge designs. SiFive has spent the past two years sharpening its datacentre story, and as previously reported by eeNews Europe when SiFive moved into RISC-V datacentre AI processor IP, the company had already started scaling its architecture for higher-core-count AI infrastructure.
The timing is not accidental. SiFive’s business is based on selling processor blueprints that customers can customise for their own silicon, rather than selling finished chips. Reuters said customers such as Google already use that model, and Little argued that the market is becoming more receptive to an open-standard alternative as Arm pushes further into selling its own silicon. That makes RISC-V strategically attractive to cloud and hyperscale groups that want architectural control without depending on a single proprietary ISA owner.
SiFive is also leaning on the broader AI infrastructure shift. In January, it said in a January announcement that its high-performance platforms would adopt Nvidia’s NVLink Fusion to link RISC-V CPUs more tightly with Nvidia accelerators. The new round suggests investors are willing to fund that roadmap seriously, even though SiFive still has to prove that RISC-V CPU IP can win significant sockets in mainstream datacentre deployments rather than remaining a promising alternative.
For Europe’s chip ecosystem, the point is not just the size of the round but what it says about where fresh semiconductor money is going: into CPU IP, memory coherency, software portability and tighter coupling between general-purpose compute and AI acceleration. SiFive also has a UK R&D centre in Cambridge, giving it an established European engineering footprint as it chases higher-performance designs. SiFive funding is therefore less a routine venture story than a bet that open CPU architecture can move from embedded credibility to datacentre relevance.
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