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Intel Micron commits $500 million to GlobalWafers Anthropic says it can read Claude While the U.S. flip-flops on chip sanctions, China is building its own chip supply market — export controls are creating conditions for a Sino-Russian chip trade alliance Elon Musk receives FTC greenlight to buy Mesh Optical as interconnects emerge as AI Rapidus fab roadmap examined — first new leading-edge chipmaker in decades has one Hokkaido fab, a 2027 deadline, and 60 potential customers SiPearl South Korea Nvidia and Intel tout homegrown American chip supply chain prowess as country bolsters local production, but gaps remain — crucial Blackwell packaging steps remain offshore as projects grow in scope and scale Steam Machine interview full transcript: Valve engineers discuss $1,049 pricing, compact design, component shortages, and Windows support Inside the history of DRAM price-fixing lawsuits — how HBM allocations could make a difference after two decades of failed cases U.S. PC shipments drop 7%, market isn The bifurcated laptop landscape of Computex 2026 – MacBook Neo competitors with 8GB of RAM, and expensive Nvidia laptops promising an agentic-focused future of Windows on Arm Chinese Z.ai Imec Solidigm VP talks PCIe 6.0 SSDs, next-gen floating gate NAND, liquid cooled storage and more — Avi Shetty, VP of AI, Solutions & Market Enablement discusses the future of enterprise storage tech The AI tokenmaxxing party is crashing over spiraling costs — leaked consulting firm audio suggests no one is sure how to measure AI effectiveness US Secures Netherlands for Pax Silica Alliance in key win for strategic chip alliance — tension remains over MATCH Act restrictions China tops the list of fastest supercomputers with a CPU-only behemoth, ending US champion El Capitan Arm servers capture over 45% of data center market revenue — GPU clusters and high-end AI infrastructure fuel a tectonic shift away from x86 Post-silicon era gets closer as industry giants crack the 2D transistor scaling bottleneck with breakthrough tech — imec, ASML, and TSMC fab complementary 2D-material transistors at 50nm pitch on a 300mm wafer Ditching the cloud for local AI — how I use two mini PCs to process millions of tokens a day and save money on costly API fees Intel US pulls the AMD’s massive SP7 socket for EPYC Venice and Intel’s gargantuan 9,324-pin socket for Diamond Rapids appear at Computex — SP7 and LGA9324-1 sockets will power the next generation of AI servers Marvell details vision of optically-interconnected data centers spanning across thousands of kilometers — new interconnects sampling later this year would allow CSPs to pool resources based on workload Nvidia's high-speed AI data center storage servers break cover, touting 2.9 petabytes of storage and extreme PCIe 6.0 performance — Wiwynn shows off SCADA server with GPU-accelerated storage AI is set to consume up to 600 billion gallons of water by 2030 — rising energy consumption primarily to blame as… Google reportedly books Intel for packaging more than 3 million TPUs in 2028 — SK hynix is testing Intel's… Analyzing TSMC's fab expansion roadmap — multi-fab N2 ramp, CoWoS, SoIC, and uncorking bottlenecks
Intel
https://www.tomshardware.com/author/jake-roach · 2026-06-16 · via THP Feed -- all premium articles
Intel Logo on a wall of plants with a slight underglow
(Image credit: Tom's Hardware)

We learned a lot about Intel’s upcoming plans for desktop CPUs at Computex 2026. In classic Intel fashion, we’ve already heard a lot about the company’s next-gen CPUs, codenamed Nova Lake, even while the recent Arrow Lake Refresh CPUs are still warm from the oven. But on the ground in Taipei, we heard not only more about Nova Lake and the Z990 platform it’s arriving on, but also how Intel intends to handle the rollout and how it will fill the gaps in its lineup with “Raptor Lake Next,” which is supposedly slated to launch next year.

Trade shows are the best opportunity to learn details about unreleased products before they show up in a press deck, and simultaneously the worst venue to do so. With jet-lagged representatives and reporters, thousands of people whizzing past, and the threat of Jensen Huang showing up to sign components and shut down a floor on a moment’s notice, it’s easy for things to get lost in the shuffle. So, we’re going to work through everything we learned about Intel’s upcoming plans in stages, starting with details that are confirmed, and working toward more speculative murmurs.

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Row 0 - Cell 0

Cores (P + E)*

TDP*

Core 7*

20 (8 + 12)

65W

Core 5*

16 (8 + 8)

125W

Core 5*

10 (6 + 4)

65W

Core 3*

4 (4 + 0)

65W

Jake Roach is the Senior CPU Analyst at Tom’s Hardware, writing reviews, news, and features about the latest consumer and workstation processors.