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Latest from Tom's Hardware in Semiconductors

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China
https://www.tomshardware.com/author/luke-james · 2026-04-14 · via Latest from Tom's Hardware in Semiconductors
Toshiba
(Image credit: Toshiba)

China’s Yangtze Memory Technologies plans to build two fabs beyond the Phase 3 plant it’s due to complete in Wuhan this year, a move that would more than double its current wafer output, Reuters reported today, citing three sources familiar with the plans.

Each of the three new plants will produce 100,000 wafers per month at full capacity, while YMTC's existing two Wuhan fabs produce a combined 200,000 wafers per month. Phase 3 is expected to begin operations late this year and reach 50,000 wpm by 2027, with equipment installation already underway, per the sources that Reuters cited.

More than 50% of Phase 3's equipment has been sourced from Chinese suppliers, including tools for vertical stacking of 3D NAND layers. Advanced Micro-Fabrication Equipment (AMEC) is among the local vendors YMTC has leaned on since the U.S. Commerce Department added the company to its Entity List back in 2022.

Currently, YMTC's domestic tool adoption rate sits at around 45%, already the highest of any Chinese fab. Phase 3 is the first YMTC fab where domestic tooling crosses the halfway mark. Phase 1 and Phase 2, both already running in Wuhan, were built largely on Western equipment before the 2022 Entity List designation cut off YMTC’s access to the likes of ASML.

As such, Phase 3 will very much be a production-scale test of whether Chinese tools are advanced enough to sustain 3D NAND yields at volume. It looks unlikely, though, and the two additional planned fabs are of course contingent on that outcome. Domestically manufactured equipment accounts for just 15% to 30% of the total tools deployed in Chinese fabs, and Beijing has injected (and continues to inject) tens of billions into trying to establish tech that can compete with Western leaders.

Reuters noted that YMTC has sent low-power DRAM samples to clients and expects feedback by year-end. Both YMTC and CXMT are understood to be drastically increasing their DRAM and NAND production over the next two years, and YMTC has decided to allocate around 50% of Phase 3’s capacity to DRAM rather than NAND. YMTC is also thought to be working on developing through-silicon via packaging for high-bandwidth memory, the stacked DRAM used in AI accelerators.

YMTC held 11.8% of the global NAND market in 2025, according to a UBS report cited by Reuters, tied with SanDisk and trailing SK hynix at 16%, Kioxia at 15.9%, and Micron at 13.3%. Samsung leads at 30.4%. Yole Group projects YMTC's share could reach 15% by 2028, two years later than its 2026 goal. Its current Xtacking 4.0 architecture runs at c. 270 layers, behind SK hynix’s 4D NAND flash at 321 and Samsung’s 9th-gen V-NAND at 286.

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Luke James is a freelance writer and journalist.  Although his background is in legal, he has a personal interest in all things tech, especially hardware and microelectronics, and anything regulatory.