惯性聚合 高效追踪和阅读你感兴趣的博客、新闻、科技资讯
阅读原文 在惯性聚合中打开

推荐订阅源

F
Fortinet All Blogs
罗磊的独立博客
IT之家
IT之家
freeCodeCamp Programming Tutorials: Python, JavaScript, Git & More
月光博客
月光博客
博客园 - Franky
博客园 - 聂微东
博客园_首页
爱范儿
爱范儿
量子位
博客园 - 三生石上(FineUI控件)
G
Google Developers Blog
Martin Fowler
Martin Fowler
小众软件
小众软件
OSCHINA 社区最新新闻
OSCHINA 社区最新新闻
Cyber Security Advisories - MS-ISAC
Cyber Security Advisories - MS-ISAC
Y
Y Combinator Blog
Vercel News
Vercel News
腾讯CDC
Microsoft Azure Blog
Microsoft Azure Blog
Hugging Face - Blog
Hugging Face - Blog
奇客Solidot–传递最新科技情报
奇客Solidot–传递最新科技情报
The Cloudflare Blog
Engineering at Meta
Engineering at Meta

Latest from Tom's Hardware in Semiconductors

Post-silicon era gets closer as industry giants crack the 2D transistor scaling bottleneck with breakthrough tech — imec, ASML, and TSMC fab complementary 2D-material transistors at 50nm pitch on a 300mm wafer Intel Intel’s performance-enhanced 18A-P process enters risk production — drop-in 18A upgrade promises 9% performance improvement at iso-power, cuts thermal resistance by 40% Chinese fab SMIC TSMC says panel packaging won Analyzing TSMC's fab expansion roadmap — multi-fab N2 ramp, CoWoS, SoIC, and uncorking bottlenecks Chinese startup claims photonic chip production without DUV lithography, says nanoimprint process cuts costs by 90%… ASML becomes Europe's most valuable company ever as analysts bet on higher EUV output — its market cap hit… TSMC CEO C.C. Wei says, ‘It will be a long time before we can meet customer demand’ — tells shareholders that he will keep prices stable, refrain from implementing price hikes Samsung shows first HBM5 mockup with Heat Path Block cooling — thermal race with SK hynix shaping up Seven hospitalized after toxic gas fire at SK hynix advanced memory plant — Cheongju 4th campus incident today led… TikTok owner ByteDance is reportedly developing its own custom AI CPUs — company looks to ease China's… Trailing-edge foundry roadmaps for GlobalFoundries, UMC, and SMIC — mature node chipmakers each pursue differing… Chinese university builds 3D chip design tool tailored to Huawei's ‘LogicFolding’ architecture — 3D design delivers increased performance and better thermal management China adds homegrown AI chips to 'secure and reliable' procurement list for the first time — nine options added as move away from Nvidia continues SK hynix unveils 'iHBM' thermal architecture that cools AI memory at the source — integrated cooling elements inside HBM interface cut thermal resistance by 30%, target next-gen HBM5 accelerators and dense AI data centers Imec builds world's first High-NA EUV-fabricated quantum dot qubit device — breakthrough could pull quantum computing onto the same manufacturing roadmap as next-gen AI processors, compressing timelines Huawei claims sanctions-busting breakthrough with 1.4nm-class chips by 2031, claims 55% higher transistor density — firm claims new LogicFolding chip architecture can bypass EUV restrictions, introduces 'Tau Scaling Law' to replace Moore's Law Samsung's $400,000 payout for memory workers sparks revolt as other divisions get only $4,000, fueling intentional production slowdowns — internal resentment disrupts packaging operations, major AI chip project decisions to a complete halt The custom AI ASIC state of play (May 2026) — Broadcom deals, Google TPUs, Meta MTIA & beyond AMD begins production ramp of 256-core EPYC Venice — first 2nm HPC chip claims 70% performance leap Intel kicks off development on next-decade 10A and 7A process technologies — 14A node remains on track for… SMIC founder and AMEC CEO urge Chinese fabs to test domestic chipmaking tools on active production lines — equipment makers post record revenue but falling margins Russia’s Mikron is selling framed test wafers with up to 120,000 processors as souvenirs — 12 designs, priced around $170 each, sold alongside $2 vials of cleanroom air Trump calls $14 billion Taiwan arms deal a 'negotiating chip' with China after Xi said Taiwan issue could lead to 'clashes and even conflicts' — Trump says 'Taiwan would be very smart to cool it a little bit' Leading-edge foundry roadmaps for TSMC, Intel and Samsung — outlining the path to 1.4nm nodes and beyond TSMC allocates $20 billion to Arizona expansion — project faces water and labor shortages, complicated by visa… NASA partners with Microchip to build next-generation spaceflight chips with 100x the power of current offerings — chip designed to withstand radiation for extended missions on the Moon and Mars Intel, SK hynix shares surge following reports of chip packaging partnership — SK is said to be testing… Apple reportedly strikes deal for Intel to make some of its chips — two tech giants reached a preliminary…
Intel details 18A-P process node, touts higher performanc...
Anton Shilov · 2026-05-01 · via Latest from Tom's Hardware in Semiconductors
18A
(Image credit: Tom's Hardware)

Intel is ramping up production of its CPUs on its 18A (1.8nm-class) process technology with promising results, but at the same time, the work on its enhanced version called 18A-P is well underway with production readiness looming in the coming quarters. The company's 18A-P introduces two new types of transistors, tighter process variability control, and improved thermals to enable higher performance and lower power consumption. This is perhaps why Apple and other fabless chip designers are rumored to be considering using 18A-P.

When compared to Intel's baseline 18A, 18A-P fabrication process promises to enable chip developers to either increase the performance of their designs by 9% (at the same power) or lower their power consumption by 18% (at the same performance and complexity), according to a paper Intel released at the VLSI 2026 conference. To achieve these improvements, Intel introduced new types of gate-all-around RibbonFET transistors, including high-performance devices with enhanced contacts as well as new low-power devices. Designers can now push higher frequencies on critical paths and reduce power consumption in less demanding regions, which greatly improves overall performance efficiency.

Intel 18A-P new technology features compared to Intel 18A

Intel 18A-P new technology features compared to Intel 18A (Image credit: Intel)

Meanwhile, 18A-P retains contacted poly pitch (50nm) and library heights (180nm and 160nm) of 18A as well as design compatibility with the base process, meaning that a chip originally designed for 18A can be ported to 18A-P and benefit from certain process-level improvements (which do not rely on new transistor types), though to fully realize performance and efficiency gains requires design re-optimization.

Performance of new devices(low power and high performance) in 18A-P

Performance of new devices (low power and high performance) in 18A-P (Image credit: Intel)

Another major improvement of 18A-P over 18A is -30% skew corner tightening, which also reduces variability and improves yield efficiency. The enhancement narrows the spread between fast and slow silicon and makes it closer to 'typical' silicon as well as center-to-edge variation across the wafer. Also, the production node adds extra threshold voltage (VT) options (over 5+ pairs of logic VTs compared to 4 pairs in 18A) to enable finer-grained binning and more consistent chip behavior, which increases the proportion of dies that meet target specifications. This improves parametric yield and enables chip designers to get more higher-end silicon from a single wafer. Meanwhile, tightening of process corners does not affect defect density as existing challenges with line-edge roughness (LER) and stochastic variability remain intact.

While Intel's 18A-P retains the contacted pitch of the base node, the company still tweaked the resistance and capacitance of its metal stack, which impacts signal speed, power consumption, and timing. Yet, Intel does not characterize the changes.

Last but not least, 18A-P introduces enhancements in thermals, reliability, and voltage behavior that are critical for an advanced process technology aimed at both client and data center applications. Intel says it improved thermal conductivity by 50%. Lower thermal resistance helps manage higher power densities associated with GAA transistors, which is important for client applications. Improved logic negative-bias temperature instability (NBTI) enhances long-term device stability under high-voltage stress, which is critical for data center processors. Finally, 18A-P better aligns logic and SRAM minimum operating voltage (Vmin) to improve low-voltage operation and stability.

Intel 18A-P demonstrates ~9% iso-power performance gain (at0.75V) over Intel 18A on an industry standard ARM core sub-block

Intel 18A-P demonstrates ~9% iso-power performance gain (at 0.75V) over Intel 18A on an industry standard ARM core sub-block. (Image credit: Intel)

Intel's 18A-P is a heavily optimized version of 18A-P that not only promises higher performance efficiency but also addresses things like parametric yields, thermals, and reliability. Altogether, these enhancements make 18A-P a more mature and attractive version of 18A, not only for Intel, but also for potential external customers like Apple.

Get Tom's Hardware's best news and in-depth reviews, straight to your inbox.

Google Preferred Source

Follow Tom's Hardware on Google News, or add us as a preferred source, to get our latest news, analysis, & reviews in your feeds.

Anton Shilov is a contributing writer at Tom’s Hardware. Over the past couple of decades, he has covered everything from CPUs and GPUs to supercomputers and from modern process technologies and latest fab tools to high-tech industry trends.