







Warning
If someone is reading this blog, please be aware that the writer DID NOT consider the experience of the other readers.
After all, the most important thing is about writing things down for better memorization.
The computer itself doesn’t pretty much do anything apart from ‘computing’. It is the IO devices that connect the computer with the outer world, allowing more application and wider promotion.
We included two instruction sets(on x86) in and out to handle IO operations. The first one is to read data from the devices into the cpu, and the latter one does the opposite.
That introduces the second way of connecting cpu to the outer world, memory mapped IO.
Memory mapped IO is basically saying that, we could set up a part of the memory for a specific outer device. When writing/reading data from that part of memory, we are essentially reading data from the designated device.
The advantage of this way is that we avoid the problem that we couldn’t connect infinite devices to the cpu.
But the drawback is that a part of the memory is consumed for this mapping.
Something worth mentioning is that, the compiler doesn’t actually know the writing memory section is mapped to a device or not. Sometimes it could do unwanted optimizations. Check the example down below:
1 | void foo() { |
0 to ADDR for 1024 times. But the compiler does not know that this is a spectial section of memory which is mapped to a outer device, so it would consider no need to write the same value in repeatedly, you will end up only writing 0 one time to ADDR.-O2(or higher optimization levels).The solution is to add volatile keyword, which prevent the compiler from optimizing the code.
1 | (*(volatile char *)ADDR) = 0; |
From Wikipedia:
In computer architecture, a bus is a communication system that transfers data between components inside a computer, or between computers. This expression covers all related hardware components (wire, optical fiber, etc.) and software, including communication protocols.
From Wikipedia
In computing, a programmable interrupt controller (PIC) is an integrated circuit that helps a microprocessor (or CPU) handle interrupt requests (IRQs) coming from multiple different sources (like external I/O devices) which may occur simultaneously. It helps prioritize IRQs so that the CPU switches execution to the most appropriate interrupt handler (ISR) after the PIC assesses the IRQs’ relative priorities.
Most interaction with I/O devices are slow, as there might be interaction with the real world which are of course slower than the electronic world inside the cpu.
Because of that, we don’t want the cpu to wait until the IO jobs are done before executing other instructions.
This requires two things:
This way, the relatively slower I/O operation could be executed without halting the cpu.
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