In order to try to extend it, rather than try to cram more transistors onto the surface horizontally, chip designers have for some time focused on 3D alternatives, essentially altering the shape of the transistors to make them taller.

IBM's approach is to layer sheets of them on top of each other as well.

Professor Alan Woodward, a computer scientist at Surrey University, compared it with building a big block of flats rather than houses in a city.

"IBM's NanoStack is like proposing a 100-story skyscraper," he said, adding that in his view, the firm's closest rivals such as Samsung and Intel are closer to 30-50 story buildings with their own 3D chip work.

The challenges facing 3D chip designers include heat: the transistors can get hot as they work and heat rises.

Additionally, when the layers between them are too thin, sometimes this prevents them from switching off when they're supposed to, and this stops the chip from working.

"I think it's fair to say IBM's proposals are the most ambitious," said Prof Woodward.