


























Faced with the impossible demand of shrinking already-minute transistors to make smaller, faster chips, IBM is now stacking them up to create the first sub-1 nanometer chip.
The boffins at Big Blue revealed its 0.7nm architecture this week, the first product of work to break the 1nm barrier for Moore’s Law, Intel co-founder Gordon Moore’s prediction a chip could fit double the transistors every two years.
During a June 25 press conference, IBM Research Director Jay Gambetta said the reveal was a “landmark moment” for pushing chip tech to the scale of atoms and delivering drastic performance and power efficiency gains.
He said: “With our new nanostack architecture, we’re not just making smaller transistors, we’re reinventing how chips are built to deliver dramatically more power and energy efficiency.”
Join peers managing over $100 billion in annual IT spend and subscribe to unlock full access to The Stack’s analysis and events.
此内容由惯性聚合(RSS阅读器)自动聚合整理,仅供阅读参考。 原文来自 — 版权归原作者所有。