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Credo Technology Group is set to showcase its latest high-speed connectivity solutions for AI infrastructure at the TSMC 2026 Technology Symposium, beginning April 22 in Santa Clara, California. The company will participate in multiple symposium stops and workshops across North America, Europe, and Asia through July.

For eeNews Europe readers, the announcement highlights ongoing efforts to tackle one of AI hardware’s biggest challenges: memory and interconnect bottlenecks. It also underscores how ecosystem collaboration around advanced nodes is shaping next-generation data infrastructure.

Tackling AI memory bottlenecks

At the center of Credo’s showcase is OmniConnect Weaver, the first solution in its OmniConnect family. Designed to address memory bandwidth and latency limitations in AI inference workloads, Weaver integrates 112G VSR SerDes with a lightweight AXI framer.

Built on advanced process nodes from TSMC, including 5nm and 3nm, the solution aims to deliver high-bandwidth, low-latency connectivity across a range of architectures — from on-die links to chiplet-based designs.

Credo claims significant improvements over conventional LPDDR5X approaches, including a 10× increase in I/O beachfront density and up to 20× higher memory density. These gains target the scalability challenges facing AI inference as models grow in size and complexity.

Pushing high-speed SerDes performance

Alongside Weaver, Credo will also present its 224G PAM4 SerDes IP, implemented in TSMC’s 3nm process technology. The solution enables 224G per lane data transmission, supporting aggregate bandwidths of up to 1.6Tbps.

Such performance levels are increasingly critical for hyperscale data centers, cloud computing, and AI clusters, where efficient high-speed interconnects directly impact system throughput and power consumption.

“Credo has a longstanding partnership with TSMC and we share a vision for accelerating AI through innovation and collaboration,” said Jeff Twombly, Vice President of Business Development at Credo. “TSMC’s Technology Symposium events bring the ecosystem together to learn, network, and exchange ideas. We value the opportunity to be part of these important discussions which are shaping the energy-efficient, scalable AI architecture of the future.”

Global symposium presence

Credo’s participation spans multiple locations, including stops in Austin, Boston, Hsinchu, Amsterdam, Shanghai, and Yokohama. The broad presence reflects the global nature of semiconductor ecosystem development, particularly as AI drives demand for advanced packaging, chiplet integration, and high-speed interconnect technologies.

With AI infrastructure scaling rapidly, solutions like OmniConnect Weaver and next-generation SerDes IP point to a growing focus on optimizing data movement — an area increasingly seen as critical as compute performance itself.

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