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Vertical power delivery platform aims to ease AI infrastructure constraints
Alina Neacsu · 2026-06-24 · via ... eeNews Europe

Vertical power delivery platform aims to ease AI infrastructure constraints

Technology News |

By Alina Neacsu



Lotus Microsystems has launched a vertical power delivery platform designed to bring power conversion closer to processors while addressing thermal management within the same architecture.

For eeNews Europe readers, the development highlights how advanced packaging and power delivery technologies are becoming critical as AI infrastructure moves towards higher current densities and more demanding accelerator designs.

Integrating power and cooling at the processor

The Copenhagen-based company has introduced vStrata, a platform built around what it calls silicon Power Interposer Technology (PIT). The approach places power delivery directly beneath the processor, aiming to reduce electrical losses while simultaneously managing heat at the point of load.

According to Lotus Microsystems, current vertical power delivery approaches often focus primarily on electrical efficiency, leaving thermal management as a separate design challenge. The company says vStrata combines electrical, thermal and mechanical considerations within a single architecture.

“We have reached a point where AI compute performance is constrained by physical architecture,” said Hans Hasselby-Andersen, CEO of Lotus Microsystems. “vStrata was developed to address the reality that power delivery and thermal management have become inseparable system constraints. By integrating both into a single co-engineered platform, we help data centers increase compute density while reducing the power and cooling overhead that drives AI infrastructure cost.”

The first product in the platform family, the LSC0580 module, is expected to begin shipping engineering samples in the third quarter of 2026. The company says the design has already been taped out for several xPU and AI infrastructure applications.

Designed for higher AI compute density

Lotus Microsystems says the LSC0580 targets kiloampere-class power requirements for AI processors and is designed to achieve up to 96% point-of-load efficiency. The company also claims the architecture can potentially reduce power conversion losses by more than 50% compared with conventional approaches.

The silicon-based substrate is intended to improve thermal conductivity while shortening the electrical path between power conversion and the processor. Lotus Microsystems says this can reduce operating temperatures by up to 25°C in optimised configurations and support load transients above 10A/ns without external capacitors.

“The industry has been trying to scale AI compute using an architecture that was never designed for this level of intensity,” said Yasser Nour, co-founder and CTO of Lotus Microsystems. “The real bottleneck isn’t just delivering power – it’s how the system responds to rapid, unpredictable load changes. By collapsing the distance between the power supply and the processor, vStrata is designed to deliver current where and when it’s needed, without compromising thermal behavior or transient stability.”

Lotus Microsystems says it is working with Tier-1 hyperscalers and expanding engagement through an early access programme, with engineering samples scheduled for Q3 2026.

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