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SEALSQ has taken a step deeper into the emerging post-quantum security market with plans for a semiconductor personalization center in India. The company announced its participation in the inauguration of Kaynes Semicon’s new OSAT facility in Sanand, Gujarat, where the first phase of a joint SEALSQ – Kaynes Post-Quantum Cryptography (PQC) Personalization Center will be located.

The facility opening was attended by India’s Prime Minister Narendra Modi and broadcast nationally, underlining the strategic importance of the country’s growing semiconductor sector. For engineers and executives following global chip supply chains, the project highlights how hardware security and local manufacturing are becoming tightly linked.

A step toward sovereign semiconductor security

The planned PQC Personalization Center will operate inside Kaynes Semicon’s outsourced semiconductor assembly and test (OSAT) plant in Sanand. According to the companies, the facility aims to enable the full lifecycle of secure chips — from assembly and testing to cryptographic provisioning — within India.

The goal is to avoid sending uninitialized chips abroad for security provisioning, which can expose vulnerabilities in supply chains. Once operational, devices based on SEALSQ’s QS7001 security microcontroller are expected to be assembled, tested, and cryptographically personalized locally before entering markets.

Those devices are targeted at IoT systems, digital identity infrastructure, industrial networks, and government deployments in India, as well as markets across South and Southeast Asia.

The initiative reflects a broader trend among governments seeking sovereign control over trusted hardware supply chains as cybersecurity threats grow.

Preparing hardware for the post-quantum era

A key driver behind the project is the looming impact of quantum computing on today’s cryptography. Classical public-key systems such as RSA and elliptic curve cryptography could eventually be broken by quantum algorithms like Shor’s algorithm.

Security agencies and standards bodies have already begun preparing for that shift. In 2024, the US National Institute of Standards and Technology (NIST) finalized the first set of post-quantum cryptography standards, including ML-KEM, ML-DSA, and SLH-DSA.

SEALSQ’s QS7001 microcontroller is designed to implement these algorithms directly in hardware. The chip acts as a hardware root of trust, combining post-quantum cryptography with conventional methods such as AES-256, RSA-4096, and ECC P-384 to support hybrid security deployments.

It also integrates a true random number generator, secure key storage, a cryptographic coprocessor for lattice-based algorithms, and protections against tampering and side-channel attacks.

Personalization at industrial scale

Chip personalization is the step where an otherwise anonymous silicon device receives a unique identity. In the Sanand facility, each chip will be assigned a device identifier, generate its own asymmetric key pair internally, and receive an X.509 certificate issued by a trusted authority.

The center will rely on FIPS 140-3 Level 3 certified hardware security modules for key generation and certificate signing. According to the companies, operations will include secure key ceremonies and detailed chain-of-custody logging to meet compliance requirements.

The project will be operated by SEALKAYNESQ Ltd, a joint venture being established by SEALSQ and Kaynes Semicon following a letter of intent signed earlier this year.

“Our partnership with Kaynes and the launch of this PQC Personalization Center represent a critical step in enabling India to secure its digital future,” said Carlos Moreira, Founder & CEO, SEALSQ Corp. “By embedding post-quantum security directly into semiconductor infrastructure, and doing so on Indian soil, under Indian governance, we are helping build a resilient, sovereign, and future-proof technology ecosystem that can serve as a model for the region.”

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