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Next-gen MRDIMM standard nears completion targeting 12,80...
Alfonso Maruccia · 2026-05-04 · via TechSpot

Serving tech enthusiasts for over 25 years.
TechSpot means tech analysis and advice you can trust.

In context: The Joint Electron Device Engineering Council (JEDEC) Solid State Technology Association, established in 1958, is responsible for developing technology standards in the microelectronics industry. All major players in the chip industry participate in JEDEC's standardization efforts, which include critical memory solutions used across consumer, server, and data center platforms.

JEDEC's latest announcement provides an updated timeline for the future of MRDIMM, a relatively new memory standard introduced a few years ago to support bandwidth-intensive data workloads. Multiplexed Rank DIMM technology uses a multiplexing register and buffers to allow two memory ranks to operate simultaneously on a single DIMM, effectively doubling the amount of data that can be transferred per memory channel.

MRDIMM modules maintain the same physical and electrical interface as traditional DDR5 modules while offering higher bandwidth (8,800 MT/s and beyond) and potentially lower latency. JEDEC's JC-40 and JC-45 committees are now working to further refine the technology, with the goal of finalizing the next-generation (Gen2) MRDIMM standard.

The consortium's announcement also addresses several components of the new technology. First, the newly published JESD82-552 (DDR5MDB02) Multiplexed Rank Data Buffer standard defines next-generation data buffer capabilities, enabling better scalability for future MRDIMM products. JEDEC is also expected to publish specifications for the DDR5 Multiplexed Rank Registering Clock Driver (JESD82-542 DDR5MRCD02), which will improve signal integrity and timing control in DDR5 MRDIMM module designs.

Both JESD82-552 and JESD82-542 are designed to complement each other, fulfilling the requirements needed to finalize the MRDIMM Gen2 memory standard. According to JEDEC, specifications for next-generation MRDIMM are nearly complete, along with an improved DDR5 MRDIMM raw card design that could enable data transfer rates of up to 12,800 MT/s. Meanwhile, the JC-45 committee is already planning the development of the upcoming MRDIMM Gen3 standard.

The industry organization emphasizes that MRDIMMs are part of a broader shift toward high-performance memory technologies. The market is racing to meet demand driven by AI, cloud computing, and enterprise workloads, while consumer solutions lag behind, often relying on more incremental or backward-looking designs such as HUDIMM modules.

MRDIMMs are intended for server systems and data centers, meaning they require significant investment and powerful server CPUs such as Intel Xeon or AMD Epyc to deliver their full potential. In parallel, JEDEC is actively developing the DDR6 standard, while MRDIMM modules are expected to remain based on the DDR5 interface for the foreseeable future.