IBM has unveiled what it claims is the world’s first sub-1 nanometre chip technology, a research breakthrough that could extend semiconductor scaling for another decade as conventional transistor designs approach their physical limits.

The technology, demonstrated at the 0.7 nm, or 7 angstrom, node uses a new three-dimensional transistor architecture called “nanostack”. IBM said the design could deliver up to 50% higher performance or 70% better energy efficiency compared with its 2 nm technology unveiled in 2021.

The chip can pack nearly 100 billion transistors into an area roughly the size of a fingernail, almost twice the density of IBM’s 2 nm chip. Transistors are the tiny electronic switches that perform calculations inside a processor. Packing more of them into a smaller area can improve computing power while reducing energy consumption.

“IBM’s latest chip breakthrough marks a landmark moment in computing, pushing technology beyond the nanometer era to the scale of atoms,” Jay Gambetta, director of IBM Research and IBM Fellow, said.

“With our new nanostack architecture, we’re not just making smaller transistors, we’re reinventing how chips are built to deliver dramatically more power and energy efficiency,” he added.

Unlike existing nanosheet designs, IBM’s nanostack architecture places transistors vertically and in a staggered arrangement. This allows chipmakers to fit more components into the same area and use different materials in each layer to separately optimise performance and power consumption.

IBM said it had validated the architecture through working transistor structures and a functional CMOS inverter, a basic building block used in digital chips. Researchers also demonstrated a 40% improvement in the scaling of SRAM, the high-speed memory placed close to processors. More compact SRAM could help feed data faster to artificial intelligence chips, where memory bandwidth is becoming a major bottleneck.

The company said the 0.7 nm label refers to a generation of manufacturing technology rather than the exact physical size of every transistor feature. At such advanced nodes, dimensions are increasingly described in angstroms, with one angstrom equal to one-tenth of a nanometre.