In the modern AI datacenter – really, a data galaxy at this point because AI processing needs have broken well beyond the bounds of a single datacenter or even multiple datacenters in a region in a few extreme cases – has two pinch points in the network. There is the datacenter interconnect that creates a router backbone to lash multiple datacenters together into a single working compute complex, and then there is the back-end network that creates a single memory domain across dozens to someday hundreds or thousands of GPUs or XPUs as the most useful granularity for mixture of expert training and inference.

Last fall, Cisco took care of the datacenter interconnect with its “Dark Pyramid” P200 router chip, part of the ever-embiggening and enfattening Silicon One product line, which is used by Cisco in its own switches and routers as well as by hyperscalers and cloud builders in their custom gear.

And this week, at the Cisco Live conference in Amsterdam, Cisco is ratcheting up the bandwidth on the switch side with its G300 ASIC, which delivers 102.4 Tb/sec of aggregate bandwidth and which is meant to take on Broadcom and Nvidia in the rush towards 1.6 Tb/sec ports to link GPUs and XPUs in back-end networks as well as goose the front end networks with 800 Gb/sec ports delivered through higher radix switches that flatten the network and radically lower the cost of it, too.

We don’t know the codename of the G300 chip, but we do know that it doubles up on the basic feeds and speeds of the G200 switch ASIC that launched in June 2023 and that was explicitly brought to market to take on InfiniBand in scale-out networks for AI and HPC clusters. The G200 started getting traction in this work back in May 2025 as a more scalable and cheaper alternative to InfiniBand, but make no mistake: Nvidia is still selling a hell of a lot of InfiniBand scale out networks and has made a fortune off of NVSwitch interconnects for back-end, scale-up networks for linking GPU memories.

The G200 and now G300 ASICs are explicitly designed to deliver a much-improved and stripped-down Ethernet that can do what InfiniBand does well – high bandwidth, low latency, adaptive routing, and congestion control – while at the same time preserving many Ethernet advantages that are lacking in InfiniBand – security, microsegmentation, and multiple vendors competing against each other. InfiniBand has one source, and this has become a sticking point for some.

The G300 is coming out today along with new Nexus 9000 and Cisco 8000 systems, new pluggable optics modules that plug into them, and network operating system and control plane updates to make it easier to manage larger scale-up networks or beefier front-end networks that feed into AI systems using G300-based switches.

Cisco has not yet provided a technical deep dive on the G300 ASIC, so we cannot share a block diagram of the chip or the schematics of the G300 switches. But we do have some basic feeds and speeds and insight from Rakesh Chopra, senior vice president and Cisco Fellow in charge of Silicon One development.

Like the G200, the G300 has 512 SerDes circuit blocks for creating the ports, all wrapped around a packet processing engine. Both also have a single Ethernet MAC address per SerDes, which allows ports and MACs to be mapped at a one to one ratio. (Many switch ASICs have half as many MAC addresses per SerDes, which is fine if you are aggregating SerDes to create ports of a given bandwidth. But what if you want to cut it down to make a high radix switch with a lot more lower bandwidth ports? Well, you run out of MAC addresses.)

And like the P200 that was announced last fall, the G300 is what is called a “lidless” chip design, which means the packaging lid has been removed so that heat sinks for air cooling and blocks for liquid cooling can be mounted directly on the chip and more efficiently remove its heat.

The 25.6 Tb/sec G100 switch ASIC from October 2022 was etched in 7 nanometer processes from Taiwan Semiconductor Manufacturing Co, and the G200 from the summer of 2023 was etched in 5 nanometer processes from Taiwan Semiconductor Manufacturing Co. With an SRAM cache buffer of 252 MB on the G300, which we think is at least 2X higher than the buffer in the G200, and a constant number of faster SerDes, we think Cisco has chosen a mix of processes from TSMC to etch the G300. The G300 is a multichip design, and if you forced us to guess, we would say that the packet processing engine chip block and its SRAM buffer were made using 3 nanometer processes and the SerDes chiplets wrapping around it were etched in the reasonably mature 4 nanometer refinement of the 5 nanometer process from TSMC. It is harder to shrink signaling circuits than it is to shrink computational circuits, and it also turns out to be more expensive to use 3 nanometer than 4 nanometer technology.

That 252 MB buffer is a single, unified, shared buffer for all 512 SerDes, and is not segmented to support groups of SerDes on a switch ASIC as is the case with some other designs, says Chopra. So not only is it bigger, but it is a single shared memory for all the SerDes, which improves the efficiency of operations, particularly when there is a lot of congestion in the network and the buffer is used to keep Ethernet from dropping packets on the floor and letting them shatter.

That deep buffer is married to a set of on-chip hardware load balancing agents that can look inside the switch and understand what is flowing through the switch and create a map of flows, with their congestion and transmission failures, how to optimize traffic across all of the G300s in the network. This software is algorithmic, but it is not, technically speaking, AI. And, like all Silicon One chips, the G300 is fully programmable in the P4 network programming language and new features and functions can be created on the fly as they emerge in the market.

The SerDes used in the G300 are designed by Cisco and deliver 224 Gb/sec before encoding and 200 Gb/sec after encoding. (We suspect that the native signaling clock of the SerDes is 112 Gb/sec and it gets doubled up to 224 Gb/sec using PAM4 modulation, which can pump two bits per signal.) This is the first 200 Gb/sec SerDes to come from Cisco, by the way.

If you wanted to, you could create a 512-port switch with each port running at 200 Gb/sec using the G300 chip, or one with 256 ports running at 400 Gb/sec, 128 ports running at 800 Gb/sec, or 64 ports running at what still sounds like an amazing 1.6 Tb/sec.

By the way, the G300 can drive linear pluggable optics (LPO) directly at 800 Gb/sec per port and Cisco has an LPO module that marries to switches using the G300. Cisco also has its own 1.6 Tb/sec OSFP pluggable optics module for those choosing to use the G300 to drive 1.6 Tb/sec ports. This are optics modules are based on Cisco’s own silicon, not stuff brought in by third parties. (Nvidia and Broadcom are also one-stop shops for these components.) But in an interesting twist, Cisco is also building pluggable modules based on third party DSPs for customers who need choice or desire second sourcing to thin out the risk across a wider supply chain.

By moving to LPO, there is a huge power savings, which can in turn allow more power to be allocated to compute engines. Chopra says that it is about a 50 percent power savings for the optics and about a 30 percent savings across the switch infrastructure in an AI cluster. This is a big deal.

Some customers need higher bandwidth for forthcoming GPUs and XPUs that are expected in the second half of 2026, so they will spend the extra power to get 1.6 Tb/sec ports. Other customers are hanging back and 800 Gb/sec is fine and therefore the lower-power LPO modules are the better option.

When you add it all up and normalize for bandwidth, the G300 delivers 33 percent higher network utilization and 28 percent faster job completion time than the G200 and many of its competitors out there in the field, says Chopra.

“Of the big things in this announcement, we have the raw technology, but how we actually test and qualify our optics is completely unique,” brags Chopra. “We have a vastly more comprehensive test structure than others in the industry. And the reason is that AI workloads are synchronous, and a single failure of an optical module is not like a failure in the front end network. It forces a AI job restart – you have to go back to a checkpoint and restart.”

Cisco is putting the G300 in a number of devices. For air cooled devices, the G300 is in the Nexus N9364-SG3 running the company’s own NX-OS operating system and the Cisco 8133 running the open source SONiC network operating system.

These switches take up 3U of rack space and have 64 ports running at 1.6 Tb/sec.

If you want to go more compact and have liquid cooling as well as an Open Rack setup, then there is the Nexus N9363-SG2 running NX-OS and the Cisco 8132 running SONiC. This is a 21-inch wide unit that adheres to the Orv3N specification from the Open Compute Project.

Here’s a closer look at the water cooled switch:

The upshot of this is that if you want to provide an aggregate of 102.4 Tb/sec of connectivity between GPUs in a scale up network or across server nodes and their GPUs linking to each other across a scale out network, it would take six G200 devices cross-coupled and now it only takes one G300.

This also probably means the G300 can cost three or four times as much and still feel like a bargain compared to the G200. We have no idea what it actually costs, but the old ways before AI came along were for the new ASIC to cost somewhere around 1.5X to deliver 2X the bandwidth per ASIC unit.

That 70 percent better power efficiency is a big, big deal when the companies driving the GenAI revolution are buying capacity in blocks of gigawatts.

We think that eventually Cisco will create a G300 variant that will support some sort of memory coherence protocol for linking GPU memories together, and it very likely will be the ESUN protocol proposed by Meta Platforms through the Open Compute Project. But Cisco is mum on all of this, officially.

In addition to the G300 and its switches and optics, Cisco this week is also fleshing out the lineup of P200 devices. Last fall, Cisco debuted the P200 in a 51.2 Tb/sec router for DCI links with 64 800 Gb/sec ports, and now it is delivering the P200 in commercial-grade Nexus gear as well as in line cards for its Nexus and whitebox modular switches.