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The Next Platform: In-depth coverage of high end computing

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How HPC And AI Digital Twins Accelerate Quantum Error Correction
2026-04-17 · via The Next Platform: In-depth coverage of high end computing

When talking about the future of commercial, fault-tolerant quantum computing, high on the list of priorities is the thorny challenge of error correction. Qubits, the cornerstone of quantum computing, are fragile and noisy and can fall apart – decohere – easily, causing errors in a system’s calculations, and a system that churns out error-prone results isn’t useful.

Foundational to the work on quantum error correction (QEC) are logical qubits, which are created by entangling multiple physical qubits, whose quantum state can be destroyed by environmental noise like light, sound, or the movement of other qubits. Logical qubits allow for error detection and correction while protecting physical qubits.

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There are myriad efforts underway to make error correction manageable and scalable. We’ve written about QEC advancements in quantum chips from the likes of Microsoft, Google, and Amazon Web Services.

They’re examples of what Janakiram Saripalli, a full-stack engineer with ModAI, a company that creates business tools using AI, large language models, and robotics, says is the changing nature of QEC development.

“Today, the field is undergoing a critical transition,” Saripalli wrote, noting that a key challenge is scale due to the need in early quantum systems for hundreds or thousands of physical qubits to create single reliable logical qubit. “This overhead is why fault tolerance has long seemed out of reach. That perception is now changing. Recent advances are shifting fault tolerance from abstract theory into real hardware design. Researchers are no longer asking whether error correction works, but how to implement it efficiently.”

Bringing In Classical Systems And AI

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Earlier this month, scientist with AWS, Quantum Elements, the University of Southern California, and Harvard University wrote about research they did using digital twin technology and a cloud HPC system to run simulation models that can advance research for quantum error correction.

It also puts into greater focus the roles that classical HPC, AI, and software will play in researching and developing QEC.

“These results make hardware-faithful noisy circuit simulation practical at experiment-relevant scales that were previously out of reach, enabling routine digital-twin studies of QEC on classical cloud infrastructure,” the scientists wrote. “Because the workflow is efficient enough to run at volume, it can also generate realistic syndrome datasets for developing and validating more expressive decoders – an important lever for stronger logical-error suppression and improved QEC code performance.”

At the core of the research was AI digital twin technology from startup Quantum Elements and AWS EC2 Hpc7a instances orchestrated by AWS ParallelCluster cluster management tool The scientists were able to run quantum master‑equation simulations of a distance‑7 rotated surface code with 97 physical qubits. Distance-7 surface code is a QEC method in which physical qubits are arranged in a 2D lattice. It requires 97 physical qubits, which is beyond what open-system simulations on a classical system can do. Using Quantum Element’s digital twin capabilities and the cloud HPC system with 96 virtual CPUs, they were able to run the simulation in 75 minutes on a single compute node and better capturing coherent and correlated noise that other models, such as Clifford gate simulators, miss.

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It’s a significant step in addressing QEC, according to Izhar Medalsy, Quantum Elements’ co-founder and chief executive officer.

“You're now at a point where you can accelerate quantum error correction development in an environment that is realistic,” Medalsy tells The Next Platform. “It allows you to tweak parameters and change them based on whichever platform you're working on. It also allows you look at advanced features and advanced quantum error correction strategies, for instance, qLDPC.” (That is quantum low-density parity check, a family of QEC codes.)

Addressing The Shortcomings Of Alternatives

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The researchers used a real-time quantum Monte Carlo algorithm developed at USC to run the quantum master-equation simulations of the distance-7 rotated surface code. The algorithm – which compresses by using a finite number of stochastic trajectories to reduce memory and computational requirements – was used to accelerate the master-equation digital twin. The scientists created a circuit that contained 228 single-qubit Hadamard gates and 168 entangling two-qubit gates arranged eight layer the brought together data and ancilla – or “helper qubits.”

The scientists wrote that the setup addressed shortcomings found in other master-equation simulation technologies that use digital twins. Such alternatives, like Clifford simulators are faster and also can extract syndrome statistics used for detecting and correcting errors and true errors on the data qubits, but they come with tradeoffs.

Clifford simulators require that qubit noise is expressed in way that’s compatible with the framework and can miss coherent and phase-sensitive effects, they wrote. There are also tensor-network methods rely on approximate contraction and truncation, which makes their cost and fidelity vary and also may miss noise behaviors. In addition, in such methods, simulation becomes difficult beyond 15 to 20 qubits, they wrote.

The 97-Qubit Milestone

“If you look at what is known as ‘brute force’ computation, you're probably limited to about 20 noisy qubits,” Medalsy says. “But using this ability to break down the scale of the computational size of what you're dealing with in some mathematical fashion, we're able to go way above and beyond that and reach a size that we and the industry see as very critical, which is 97 qubits. Ninety-seven qubits allow you to do surface-code distance-7, which is a size that is big enough to push through this below-threshold capability [and] mimic a system that is big enough that it represents kind of state-of-the-art.”

In such a large-scale digital twin, researchers can take into account such effects as crosstalk between qubits – how “neighboring qubits are effecting your behavior,” he says – to create a realistic computational system design that can be used to train next-generation decodes and rapidly advanced QEC development.

“The moment you're able to simulate or build such a large digital twin, now you're in position to not necessarily wait for the hardware to mature to a point where you can only then start developing those quantum error correction strategies, but actually work in parallel track to the development of your hardware, where at the moment it gets to maturity, at the size where it can support large-scale quantum error corruption, your quantum error-correction decoders and strategies are already matured enough, and it accelerates towards fault tolerance,” Medalsy says.

Accelerating The Work

The research reported by the scientists is a first step, he says. Accelerating and scaling such calculations are always goals. At the same time, the work addresses an important step in QEC development, which is getting AI into the mix to reach those goals.

“One of the biggest barriers of AI really participating is data generation,” Medalsy says. “When you think of data generation, you're ultimately limited today by the fact that that the [hardware] system that you will work on today to train your machine or your ML [machine learning] or AI is effectively a two-year-old system. It was conceived or designed a few years ago. How do you develop a forward-looking approach?”

It’s both the scale and efficiency that the research shows that is important. The work can be done in just more than an hour now. With AI-powered digital twins, making it faster just requires some more resources.

“If you can now change the configuration of this system to a future state and run those training sessions again and again and again, all of a sudden the machine that you're now building virtually and the decoders and the strategies that you are building are aligned with where the hardware is going to get in a year or a couple years from now,” he says. “We see it as the only way to accelerate and the only way to really train and build ML and AI that is native to those future systems without having access to them.”