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博客园 - scott_h

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GDDR
scott_h · 2025-06-07 · via 博客园 - scott_h

GDDR7 JESD239 Graphics Double Data Rate (GDDR7) SGRAM
https://www.jedec.org/news/pressreleases/jedec-publishes-gddr7-graphics-memory-standard

GDDR7规范深度解读
https://zhuanlan.zhihu.com/p/686201088

ARLINGTON, Va., USA – MARCH 5, 2024 –JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, is pleased to announce the publication of JESD239 Graphics Double Data Rate (GDDR7) SGRAM.  This groundbreaking new memory standard is available for free download from the JEDEC website.  JESD239 GDDR7 offers double the bandwidth over GDDR6, reaching up to 192 GB/s per device, and is poised to meet the escalating demand for more memory bandwidth in graphics, gaming, compute, networking and AI applications.

JESD239 GDDR7 is the first JEDEC standard DRAM to use the Pulse Amplitude Modulation (PAM) interface for high frequency operations.  Its PAM3 interface improves the signal to noise ratio (SNR) for high frequency operation while enhancing energy efficiency.  By using 3 levels (+1, 0, -1) to transmit 3 bits over 2-cycles versus the traditional NRZ (non-return-to-zero) interface transmitting 2 bits over 2-cycles, PAM3 offers higher data transmission rate per cycle resulting in improved performance.

Additional advanced features include:

    Core independent LFSR (linear-feedback shift register) training patterns with eye masking and error counters to improve training accuracy while reduce training time.
    Doubles the number of independent channels doubles from 2 in GDDR6 to 4 in GDDR7.
    Support for 16 Gbit to 32 Gbit densities including support for 2-Channel mode to double system capacity.
    Address the market need for RAS (Reliability, Availability, Serviceability) by incorporating the latest data integrity features including on die ECC (ODECC) with real time reporting, data poison, Error check and Scrub, and command address parity with command blocking (CAPARBLK).

“JESD239 GDDR7 marks a substantial advancement in high-speed memory design,” said Mian Quddus, JEDEC Board of Directors Chairman. “With the shift to PAM3 signaling, the memory industry has a new path to extend the performance of GDDR devices and drive the ongoing evolution of graphics and various high-performance applications.”

“GDDR7 is the first GDDR that not only focuses on bandwidth but addresses the market needs for RAS by incorporating the latest data integrity features that allow GDDR devices to better service existing markets such as Cloud gaming and compute and extend into new applications such as AI,” said Michael Litt, Chair of the JEDEC GDDR Subcommittee.

Industry Support

“The groundbreaking GDDR7 memory standard unveiled today represents a pivotal step towards unlocking the potential of next-generation consumer, gaming, commercial, and enterprise devices,” said Joe Macri, Compute and Graphics CTO and Corporate Fellow at AMD. "By harnessing the transformative power of GDDR7s, we can collectively unlock a new era of transformational compute and graphics possibilities, paving the way for a future shaped by innovation and discovery."

“Micron has a long-standing history of defining graphics DRAM standards with JEDEC and has played a critical role in driving GDDR7 standardization activities with our partners and customers,” said Frank Ross, lead architect and distinguished member of technical staff in Micron’s Compute and Networking Business Unit. “The development of GDDR products utilizing multi-level signaling has helped define a path to meet increasing future system bandwidth requirements. With the addition of leading RAS functionalities, the GDDR7 standard addresses workload requirements well beyond traditional graphics markets.”

“NVIDIA is excited that our work with JEDEC has helped to make PAM signaling the foundational technology for GDDR7, helping customers to get the most performance out of their GPU,” said Kaustubh Sanghani, VP GPU Product Management at NVIDIA.

“AI, HPC, and high-end gaming are demanding high-performance memory to process data at unprecedented speeds,” said YongCheol Bae, EVP, Head of Memory Product Planning, Samsung. “GDDR7 32Gbps will achieve 1.6x higher-performance with the highest reliability and cost-effectiveness.”

“With each successive generation of graphic memory, the industry always strives to achieve the ambitious goal of simultaneously securing the highest speed and improved power efficiency. SK hynix is proud to have participated in the GDDR7 standard work as a member of JEDEC, and is pleased to be able to provide customers with the memory with the highest speed and excellent power efficiency. Achieving the standard work once again will be a new opportunity for the industry to expand the memory ecosystem,” said Sang Kwon Lee, SK hynix VP of Product Planning.

https://www.sohu.com/a/485600408_120111001

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