Huawei says it plans to achieve transistor density equivalent to 1.4-nanometer chip processes within the next five years, outlining a new approach to semiconductor development that aims to overcome the limitations imposed by US export controls.

The Chinese technology giant announced the strategy during a semiconductor symposium in Shanghai on Monday. As per a report, the company said future high-end chips will rely on a framework it calls the Tau Scaling Law, which focuses on improving how quickly data and signals move through chips and computing systems rather than depending solely on shrinking transistors.

The announcement comes as China pushes to reduce its reliance on foreign semiconductor technologies. US sanctions have restricted Chinese firms’ access to advanced chipmaking equipment, particularly extreme ultraviolet lithography tools used to manufacture the world’s most advanced chips.

Huawei did not provide independent performance data to support its claims. However, the company said the approach could enable chips with transistor density comparable to 1.4 nm processes by 2031, a level expected to be near the leading edge of global semiconductor manufacturing by the end of the decade.

Beyond transistor shrinking

The semiconductor industry has long relied on Moore’s Law, which predicts that the number of transistors on a chip doubles roughly every two years. But as components approach atomic dimensions, further miniaturization has become increasingly difficult and expensive.

Huawei’s proposed Tau Scaling Law shifts attention from transistor size to system-level efficiency. Instead of focusing only on packing more transistors onto silicon, the company aims to shorten interconnect distances, reduce latency, and improve data movement within chips.

“What Huawei is proposing is a shift from traditional node-driven scaling to system-level efficiency scaling,” said He Hui, director of semiconductor research at Omdia.

“Rather than depending solely on smaller transistors, the company is focusing on shortening interconnect, lowering latency and improving data movement inside the chip, which is a credible way to extract more performance when leading-edge lithography is constrained.”

Huawei said its first Kirin smartphone chips based on a Tau Scaling architecture called LogicFolding will launch later this year. According to the company, the design shortens wiring inside chips and significantly boosts performance.

The company also plans to deploy LogicFolding technology in its Ascend AI processors and large-scale AI computing clusters by 2030.

AI race drives urgency

The move reflects the growing importance of AI hardware in China’s technology ambitions. Huawei’s Ascend processors have become a key domestic alternative as restrictions limit Chinese access to Nvidia’s most advanced AI chips.

Huawei said its chip division has designed and mass-produced 381 chips over the past six years using concepts related to Tau Scaling. These chips are used across smartphones, AI computing, and other industries.

The company’s semiconductor business has become increasingly important since Huawei was placed on a US trade blacklist in 2019. Following those restrictions, Huawei accelerated efforts to develop domestic alternatives for critical technologies.

Despite the ambitious targets, industry analysts caution that significant challenges remain. Advanced chip design tools, thermal management, power efficiency, and large-scale system integration continue to present hurdles.

“Cost, power, heat, and system integration remain major challenges, especially for Cloud AI servers,” said Brady Wang, associate director at Counterpoint Research.

Huawei’s chip head He Tingbo acknowledged the obstacles but remained confident about the company’s long-term prospects.

“Given all the various constraints, we have found some pretty good solutions… I can confidently say in the coming 10 years our solutions for mobile computing and AI computing will be competitive.”