It's not a binary choice. Independent boffin builds a ternary CPU on an FPGA
Three is the magic number as first off-the-shelf general-purpose ternary hardware since c 1965 lands
The 5500FP is a ternary CPU implemented on an FPGA. It's not very fast, but it makes it easier to experiment with computers that don't use binary.
Independent researcher Claudio Lorenzo La Rosa recently published 5500FP: A 24-Trit Balanced Ternary RISC Processor. The paper is quite technical, but it's only seven pages long. It describes how to implement a ternary procesor on a conventional binary-based FPGA:
We present the 5500FP, a 24-trit balanced ternary RISC processor implemented on FPGA, with a 120-instruction ISA, native atomic synchronization primitives, and an open hardware development board. The design demonstrates the practical feasibility of balanced ternary computing on modern reconfigurable hardware, providing a concrete platform for research into non-binary architectures without the barrier of custom silicon development.
There's no inherent reason computers have to encode everything in binary. The natural world is more subtle than just "on" or "off". Another way of encoding logic that's quite well-suited to digital electronics is ternary logic. This encodes numbers in trits instead of bits. A trit can hold one of three values, rather than the two represented by "on" or "off". A common version is balanced ternary, in which one trit can hold one, zero, or minus 1.
The word "bit" is short for binary digit and was coined by the late American mathematician John W Tukey, who also came up with the word "software" and as an encore devised the Fast Fourier Transform algorithm. By extension, if a Binary digIT is a bit, then a TRInary digiT is a "trit". That's trinary as in having three discrete states, not the BOFH version.
There is a long historical precedent for ternary computer logic. The great Donald Knuth is a fan; in volume 2 of The Art of Computer Programming, he called it "perhaps the prettiest number system." The University of Iowa's Douglas Jones offers the Ternary Manifesto, which explains how number encoding works and much more. Back in 2017 a team came up with a more specialized ternary FPGA chip, and a couple of years later a South Korean team looked into wafer-scale fabrication of ternary components.
Ternary computers have been built in the past. At Moscow State University in the late 1950s – around the time the late Sir Tony Hoare was there – a team led by Sergei Sobolev and Nikolay Brusentsov built a ternary machine, the Setun Computer. A lot has been written about Setun - much is in Russian - but the Road Not Taken – Setun, the Cold War, and the Lost Future of Non-Binary Computing is interesting. Brusentsov co-wrote a technical description, Ternary Computers: The Setun and the Setun 70 [PDF], which is in English.
Setun inspired the later American TERNAC machine, which was also ternary – but it only existed as a simulation in Fortran on top of a Burroughs binary-based machine. TERNAC's developer, Gideon Frieder, published two oft-cited 1972 papers from the project: Ternary computers part I: motivation for ternary computers and Ternary computers part 2: emulation of a ternary computer.
One of the reasons that Setun didn't lead to more ternary hardware is that the underlying implementation used binary logic, with two gates holding each trit. This is easier to implement, but it's inherently wasteful: one trit can hold approximately 1.58× more data than one bit, but using two bits wastes that advantage – you could be storing a third more data in binary (two bits can represent four states, while one trit only represents three states.) However, this is also how the 5500FP processor does it, both for the good reason of using off-the-shelf logic parts and also to make it easier to interface with basically any and all other existing computer hardware, which is all binary-based.
La Rosa sees great potential in the idea, and has a whole website about it: Ternary Logic CPUs – Performance and efficiency in the third Millennium. ®