Union Minister Ashwini Vaishnaw (file photo) | Photo Credit: ANI

The Centre is targeting the production of high-tech small chips at the 2-3 nanometer (nm) node, used in products such as modern smartphones, defence equipment and computers by 2032, Ashwini Vaishnaw, Minister of Electronics and Information Technology, said on Tuesday.

He said that the government will focus on six chip categories — compute, radio frequency, networking, power, sensor and memory — under the second phase of Design Linked Incentive (DLI) Scheme, where Indian icompanies fwill have major control in odeveloping 70-75 per cent tf technology product types.

“With these six systems, we can manufacture 70-75 per cent of all the major defence, consumer electronics, industrial electronics and the critical other applications we need. And, as we move towards 2029, when Semicon 2.0 matures, India will become a major player in the semiconductor industry. We have also mapped out the path from 28nm to 7nm to 3nm to 2nm,” he told the media here on the sidelines of an event.

He said the government has studied the semiconductor journeys of Taiwan, Japan, South Korea and other countries, and after studying that and the talent base in India , the country has charted its path towards 2nm technology in the coming years.

“By 2035, the entire world now believes that India will be among the most important nations globally,” Vaishnaw added.

Vaishnaw informed that 24 chip design firms have been selected under the DLI Scheme of Semicon India, many of which have already completed tape-outs, validated products and gained market traction.

He noted that start-ups supported under the scheme have attracted nearly ₹430 crore in venture capital funding, reflecting growing confidence in India’s chip design ecosystem.

He noted that out of the 24 start-ups participating in the DLI programme, 14 have secured venture capital funding, adding that the India Semiconductor Mission, launched four years ago, has delivered strong outcomes, including 10 projects under construction, four projects expected to begin production this year, and 67,000 students trained in semiconductor chip design across 315 academic institutions.

Vaishnaw further said this has validated the government’s core approach of removing key barriers faced by semiconductor startups by providing access to advanced design tools, IP libraries, wafer and tape-out support — an architecture of support that is unique globally.

The DLI Scheme aims to accelerate domestic chip design capabilities by supporting startups and companies across areas such as system-on-chips (SoCs), telecom, power management, artificial intelligence (AI), and Internet of Things (IoT), thereby strengthening India’s self-reliance in critical semiconductor technologies.

Published on January 27, 2026