Google has placed an order for Intel to build more than 3 million of its TPUs in 2028 after months of testing Intel's advanced packaging, according to The Information, citing four people familiar with the matter. They claim that Nvidia is evaluating Intel to build a future processor that fuses four GPU dies into one unit, tied to its Feynman architecture due in 2028, and that SK hynix is testing whether its high-bandwidth memory works reliably with Intel's packaging.
Specifically, SK hynix needs to know whether Intel can run packaging to the standard that AI accelerators demand. TSMC’s CoWoS is the industry-standard process for it and has been oversubscribed for more than two years. Intel’s embedded multi-die interconnect bridge, or EMIB, is the only alternative AI chip makers can realistically qualify at volume before the end of the decade.