Meta announced four successive generations of its custom Meta Training and Inference Accelerator (MTIA) chips on March 11: The MTIA 300, 400, 450, and 500, all scheduled for deployment over the next two years. Meta described the chips as progressively optimized for AI inference workloads on the premise that HBM memory bandwidth is the binding constraint on inference.
Coming two weeks after Meta disclosed a long-term AI infrastructure with AMD, the announcement puts Meta alongside Google, AWS, and Microsoft, each of which has spent the last few years building and scaling custom silicon programs for AI accelerated workloads. Will this emerging class of chips put a dent in Nvidia's stranglehold on the AI chip industry?
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| Row 0 - Cell 0 | MTIA 300 | MTIA 400 | MTIA 450 | MTIA 500 |
Workload Focus | R&R Training | General | AI Inference | AI Inference |
Module TDP | 800 W | 1,200 W | 1,400 W | 1,700 W |
HBM Bandwidth | 6.1 TB/s | 9.2 TB/s | 18.4 TB/s | 27.6 TB/s |
HBM Capacity | 216 GB | 288 GB | 288 GB | 384-512 GB |
MX4 Performance | - | 12 PFLOPS | 21 PFLOPS | 30 PLOPS |
FP8/MX8 Performance | 1.2 PFLOPS | 6 PFLOPS | 7 PFLOPS | 10 PFLOPS |
BF16 Performance | 0.6 PLOPS | 3 PFLOPS | 3.5 PFLOPS | 5 PFLOPS |