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The new offering from the chip and silicon intellectual property company combines a second-generation client clock driver, dubbed CKD02, with a PMIC5120 power management integrated circuit and a serial presence detect hub. Together, the three chips provide what Rambus describes as a complete solution for clocked DDR5 modules operating between 8,000 and 9,600 MT/s.
The chipset is built for the emerging CUDIMM and CQDIMM module formats used in desktops and the CSODIMM format used in laptops. Those clocked module designs are intended to overcome the signal integrity, clock jitter and timing instability problems that emerge when DDR5 memory is pushed beyond 6,400 MT/s. An on-module clock driver conditions and redistributes the clock signal across the dynamic random-access memory chips on the module, allowing higher data rates without the degradation that would otherwise occur.
Rambus argues the timing aligns with a shift in how PCs handle AI. Agentic systems, which plan, execute and adapt workflows in real time, require persistent context, concurrent processing and continuous data movement between the processor and system memory. That translates to sharp increases in both bandwidth and capacity at the module level, the company said.
“Agentic workloads are fundamentally more memory-hungry, driving the need for higher memory bandwidth, greater capacity and improved efficiency in AI-enabled PCs,” said Rami Sethi, senior vice president and general manager of memory interface chips at Rambus. “Our DDR5 9600 Client Chipset, featuring the Gen2 Client Clock Driver, delivers the performance foundation needed to enable this new era of intelligent, high-performance client systems for AI-driven productivity, next-generation gaming and professional content creation.”
Within the chipset, the Gen2 client clock driver retimes, conditions and distributes the clock signal sent from the processor to the DRAM devices on the module. The PMIC5120 steps down system voltage to the levels needed to power the DRAM and the other active chips on the module. The SPD hub handles module identification, configuration and telemetry communication.
Jeff Janukowicz, research vice president at International Data Corp., said memory is becoming a bottleneck as AI workloads spread across client devices. Clocked architectures like CUDIMM and CSODIMM are how the industry is dealing with the signal integrity and timing problems that show up at higher data rates, he added, and full chipset solutions that hold stable at those speeds will be a factor in how quickly next-generation AI PCs catch on.
The launch extends Rambus’ memory module chipset portfolio from server platforms into client systems, including next-generation AI PCs, notebooks and workstations.
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