AI

Architect Labs nabs $24M to speed up chip design projects with AI

Chip design startup Architect Labs Inc. launched today with $24 million in funding from a group of prominent investors. 

Kindred Ventures led the seed round. It was joined by Perplexity AI Inc. Chief Executive Officer Aravind Srinivas, Transformer co-inventor Lukasz Kaiser, former OpenAI Group PBC executive Srinivas Narayanan and more than a half-dozen others.

Designing a chip can take years of work and tens of millions of dollars or more. Palo Alto, California-based Architect is working to make the process more efficient. The company is developing an artificial intelligence platform that automates many of the manual tasks involved in the chip development workflow.

Semiconductor projects start with a file called an RTL design. It’s a kind of early blueprint that contains only high-level details about the processor being developed. Those details include the number of circuits the device will include, the calculations they are intended to perform and the way data will travel between them.

Engineers don’t draw RTL designs but rather write them using specialized programming languages such Verilog. Each Verilog code snippet corresponds to a set of circuits or an interconnect. In a standard program, lines of code activate one after one another. Verilog code snippets activate all at once to simulate circuits that are running at the same time.

Once an RTL design is ready, engineers run tests to ensure that it meets project requirements. They then turn the design into a so-called GDSII file, which is a full-fledged chip blueprint. GDSII blueprints describe the dimensions of each translator and the angle at which it should be placed on the substrate.

Architect’s website indicates that its platform can not only generate chip designs but also perform verification. That’s the task of checking a processor blueprint for errors. Engineers perform verification by simulating the conditions under which the chip is expected to operate. For example, a simulation might test different operating temperatures to determine how server heat influences processing speeds.

The verification process also uses a mathematical method called formal verification. It enables engineers to quickly review all the potential states of a circuit cluster and identify situations where it may encounter errors.

Architect plans to sell its software to not only chipmakers but also companies that usually don’t develop custom silicon. It intends to work with AI model developers, robotics startups and neocloud operators. Architect says that it can collaborate with such customers to develop chips optimized for their workloads. 

“AI models have advanced dramatically across nearly every field, yet chip development cycles remain equally slow and painful,” said Architect co-founder and CEO Ebrahim Hussain (pictured, left, with co-founder Aaditya Subedi). “Unlocking AI-first semiconductor design requires a first-principles rethink of the entire design process, not forcing AI agents into workflows that were never built for them.”

Architect will use its newly raised funding to purchase more computing infrastructure and finance research initiatives. 

Photo: Architect Labs