Chaotic systems have been investigated in several areas of engineering. In control theory, such systems have instigated the emergence of new techniques as well, have been used as a source of noise generation. The application of chaotic systems as pseudo-random numbers has also been widely employed in cryptography. One of the central aspects of these applications in high performance situations, such as those involving a large amount of data (Big Data), is the response of these systems in a short period of time. Despite the great advances in the design of chaotic systems in analog circuits, it is perceived less attention in the optimized design of these systems in the digital domain. In this work, the polarized fixed point representation is applied to reduce the number of digital elements. Using this approach, it was possible to significantly reduce the number of logic gates in the subtraction operation. When compared to other works in the literature, it has been viable to reduce by 50 \% the number of elements per bit of the digital representation of the tent map. The chaoticity was evidenced with the calculation of the Lyapunov exponent. Histogram, entropy and autocorrelation tests were used satisfactorily to evaluate the randomness of the represented system.