


























An amplifier-less continuous-time analog-to-digital converter consisting of only passives, comparators, and inverters is presented. Beyond simplicity, the architecture displays significant robustness properties with respect to component variations and comparator input offsets. We give an analytical design procedure demonstrating how to parameterize the architecture to a range of signal-to-noise and bandwidth requirements and validate the procedure's accuracy with behavioral transient simulations.
此内容由惯性聚合(RSS阅读器)自动聚合整理,仅供阅读参考。 原文来自 — 版权归原作者所有。