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MPCS: Neuroplastic Continual Learning via Multi-Component Plasticity and Topology-Aware EWC Combining Trained Models in Reinforcement Learning Training Non-Differentiable Networks via Optimal Transport ShiftLIF: Efficient Multi-Level Spiking Neurons with Power-of-Two Quantization Probe-Geometry Alignment: Erasing the Cross-Sequence Memorization Signature Below Chance Benchmarking local Hebbian learning rules for memory storage and prototype extraction Robust volatility updates for Hierarchical Gaussian Filtering Spiking Sequence Machines and Transformers Affinity Is Not Enough: Recovering the Free Energy Principle in Mixture-of-Experts Scalable Learning in Structured Recurrent Spiking Neural Networks without Backpropagation Geometric and dynamical analysis of attractor boundaries and storage limits in kernel Hopfield networks Attractor FCM Physical Foundation Models: Fixed hardware implementations of large-scale neural networks When Does Structure Matter in Continual Learning? Dimensionality Controls When Modularity Shapes Representational Geometry Learning to Forget: Continual Learning with Adaptive Weight Decay Causal Learning with Neural Assemblies NORACL: Neurogenesis for Oracle-free Resource-Adaptive Continual Learning Text-Utilization for Encoder-dominated Speech Recognition Models EdgeSpike: Spiking Neural Networks for Low-Power Autonomous Sensing in Edge IoT Architectures EvoTSC: Evolving Feature Learning Models for Time Series Classification via Genetic Programming Analysis and Explainability of LLMs Via Evolutionary Methods Deployment-Aligned Low-Precision Neural Architecture Search for Spaceborne Edge AI SeaEvo: Advancing Algorithm Discovery with Strategy Space Evolution Primitive Recursion without Composition: Dynamical Characterizations, from Neural Networks to Polynomial ODEs MAEO: Multiobjective Animorphic Ensemble Optimization for Scalable Large-scale Engineering Applications Necessary and sufficient conditions for universality of Kolmogorov-Arnold networks Learn&Drop: Fast Learning of CNNs based on Layer Dropping Architecture-Induced Recoverability Bias in Differentiable Symbolic Regression Collocation-based Robust Physics Informed Neural Networks for time-dependent simulations of pollution propagation under thermal inversion conditions on Spitsbergen Structure-Guided Diffusion Model for EEG-Based Visual Cognition Reconstruction
Dense Associative Memories with Analog Circuits
Marc Gong Bacvanski, Xincheng You, John Hopfield, Dmitry Krotov · 2025-12-17 · via cs.NE updates on arXiv.org

The increasing computational demands of modern AI systems have exposed fundamental limitations of digital hardware, driving interest in alternative paradigms for efficient large-scale inference. Dense Associative Memory (DenseAM) is a family of models that offers a flexible framework for representing many contemporary neural architectures, such as transformers and diffusion models, by casting them as dynamical systems evolving on an energy landscape. In this work, we propose a general method for building analog accelerators for DenseAMs and implementing them using electronic RC circuits, crossbar arrays, and amplifiers. We find that our analog DenseAM hardware performs inference in constant time independent of model size. This result highlights an asymptotic advantage of analog DenseAMs over digital numerical solvers that scale at least linearly with the model size. We consider three settings of progressively increasing complexity: XOR, the Hamming (7,4) code, and a simple language model defined on binary variables. We propose analog implementations of these three models and analyze the scaling of inference time, energy consumption, and hardware. Finally, we estimate lower bounds on the achievable time constants imposed by amplifier specifications, suggesting that even conservative existing analog technology can enable inference times on the order of tens to hundreds of nanoseconds. By harnessing the intrinsic parallelism and continuous-time operation of analog circuits, our DenseAM-based accelerator design offers a new avenue for fast and scalable AI hardware.