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MPCS: Neuroplastic Continual Learning via Multi-Component Plasticity and Topology-Aware EWC Combining Trained Models in Reinforcement Learning Training Non-Differentiable Networks via Optimal Transport ShiftLIF: Efficient Multi-Level Spiking Neurons with Power-of-Two Quantization Probe-Geometry Alignment: Erasing the Cross-Sequence Memorization Signature Below Chance Benchmarking local Hebbian learning rules for memory storage and prototype extraction Robust volatility updates for Hierarchical Gaussian Filtering Spiking Sequence Machines and Transformers Affinity Is Not Enough: Recovering the Free Energy Principle in Mixture-of-Experts Scalable Learning in Structured Recurrent Spiking Neural Networks without Backpropagation Geometric and dynamical analysis of attractor boundaries and storage limits in kernel Hopfield networks Attractor FCM Physical Foundation Models: Fixed hardware implementations of large-scale neural networks When Does Structure Matter in Continual Learning? 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A 0.5-V Linear Neuromorphic Voltage-to-Spike Encoder Using a Bulk-Driven Transconductor
Meysam Akbari, Erika Covi, Kea-Tiong Tang · 2026-04-10 · via cs.NE updates on arXiv.org

This work introduces an ultralow-power voltage-to-spike encoder that achieves near-linear voltage-to-firing-rate conversion by pairing a linearized bulk-driven transconductor with a DPI-based LIF neuron. A tail-less bulk-driven differential pair improves large-signal linearity, while a translinear linearization network suppresses the dominant sinh nonlinearity and stabilizes the bias-tunable V-to-I gain. The resulting current feeds a DPI front-end that linearizes current-to-spike conversion. Fabricated in TSMC 0.18-um CMOS and operating at VDD = 0.5 V with 2-27 nA reference current, the encoder achieves a deviation of less than 5.6 percent from linearity over 0.1-0.4 V input, consumes 22-180 nW, and occupies 0.0074 mm^2.

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