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MPCS: Neuroplastic Continual Learning via Multi-Component Plasticity and Topology-Aware EWC Combining Trained Models in Reinforcement Learning Training Non-Differentiable Networks via Optimal Transport ShiftLIF: Efficient Multi-Level Spiking Neurons with Power-of-Two Quantization Probe-Geometry Alignment: Erasing the Cross-Sequence Memorization Signature Below Chance Benchmarking local Hebbian learning rules for memory storage and prototype extraction Robust volatility updates for Hierarchical Gaussian Filtering Spiking Sequence Machines and Transformers Affinity Is Not Enough: Recovering the Free Energy Principle in Mixture-of-Experts Scalable Learning in Structured Recurrent Spiking Neural Networks without Backpropagation Geometric and dynamical analysis of attractor boundaries and storage limits in kernel Hopfield networks Attractor FCM Physical Foundation Models: Fixed hardware implementations of large-scale neural networks When Does Structure Matter in Continual Learning? Dimensionality Controls When Modularity Shapes Representational Geometry Learning to Forget: Continual Learning with Adaptive Weight Decay Causal Learning with Neural Assemblies NORACL: Neurogenesis for Oracle-free Resource-Adaptive Continual Learning Text-Utilization for Encoder-dominated Speech Recognition Models EdgeSpike: Spiking Neural Networks for Low-Power Autonomous Sensing in Edge IoT Architectures EvoTSC: Evolving Feature Learning Models for Time Series Classification via Genetic Programming Analysis and Explainability of LLMs Via Evolutionary Methods Deployment-Aligned Low-Precision Neural Architecture Search for Spaceborne Edge AI SeaEvo: Advancing Algorithm Discovery with Strategy Space Evolution Primitive Recursion without Composition: Dynamical Characterizations, from Neural Networks to Polynomial ODEs MAEO: Multiobjective Animorphic Ensemble Optimization for Scalable Large-scale Engineering Applications Necessary and sufficient conditions for universality of Kolmogorov-Arnold networks Learn&Drop: Fast Learning of CNNs based on Layer Dropping Architecture-Induced Recoverability Bias in Differentiable Symbolic Regression Collocation-based Robust Physics Informed Neural Networks for time-dependent simulations of pollution propagation under thermal inversion conditions on Spitsbergen Structure-Guided Diffusion Model for EEG-Based Visual Cognition Reconstruction
Optimizing the Linear Fascicle Evaluation Algorithm for M...
Karan Aggarwal, Uday Bondhugula · 2019-05-14 · via cs.NE updates on arXiv.org

Sparse matrix-vector multiplication (SpMV) operations are commonly used in various scientific applications. The performance of the SpMV operation often depends on exploiting regularity patterns in the matrix. Various representations have been proposed to minimize the memory bandwidth bottleneck arising from the irregular memory access pattern involved. Among recent representation techniques, tensor decomposition is a popular one used for very large but sparse matrices. Post sparse-tensor decomposition, the new representation involves indirect accesses, making it challenging to optimize for multi-cores and GPUs. Computational neuroscience algorithms often involve sparse datasets while still performing long-running computations on them. The LiFE application is a popular neuroscience algorithm used for pruning brain connectivity graphs. The datasets employed herein involve the Sparse Tucker Decomposition (STD), a widely used tensor decomposition method. Using this decomposition leads to irregular array references, making it very difficult to optimize for both CPUs and GPUs. Recent codes of the LiFE algorithm show that its SpMV operations are the key bottleneck for performance and scaling. In this work, we first propose target-independent optimizations to optimize these SpMV operations, followed by target-dependent optimizations for CPU and GPU systems. The target-independent techniques include: (1) standard compiler optimizations, (2) data restructuring methods, and (3) methods to partition computations among threads. Then we present the optimizations for CPUs and GPUs to exploit platform-specific speed. Our highly optimized CPU code obtain a speedup of 27.12x over the original sequential CPU code running on 16-core Intel Xeon (Skylake-based) system, and our optimized GPU code achieves a speedup of 5.2x over a reference optimized GPU code version on NVIDIA's GeForce RTX 2080 Ti GPU.