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DUAL-BLADE: Dual-Path NVMe-Direct KV-Cache Offloading for Edge LLM Inference Progressive Semantic Communication for Efficient Edge-Cloud Vision-Language Models Efficient, VRAM-Constrained xLM Inference on Clients Folding Tensor and Sequence Parallelism for Memory-Efficient Transformer Training & Inference DORA: A Scalable Asynchronous Reinforcement Learning System for Language Model Training AMMA: A Multi-Chiplet Memory-Centric Architecture for Low-Latency 1M Context Attention Serving RaMP: Runtime-Aware Megakernel Polymorphism for Mixture-of-Experts Spark Policy Toolkit: Semantic Contracts and Scalable Execution for Policy Learning in Spark Internet of Everything in the 6G Era: Paradigms, Enablers, Potentials and Future Directions PolyKV: A Shared Asymmetrically-Compressed KV Cache Pool for Multi-Agent LLM Inference A Survey on Split Learning for LLM Fine-Tuning: Models, Systems, and Privacy Optimizations ITAS: A Multi-Agent Architecture for LLM-Based Intelligent Tutoring Latency and Cost of Multi-Agent Intelligent Tutoring at Scale TACO: Efficient Communication Compression of Intermediate Tensors for Scalable Tensor-Parallel LLM Training FreeScale: Distributed Training for Sequence Recommendation Models with Minimal Scaling Cost CommFuse: Hiding Tail Latency via Communication Decomposition and Fusion for Distributed LLM Training A Taxonomy and Resolution Strategy for Client-Level Disagreements in Federated Learning Usable Agent Discovery for Decentralized AI Systems Cloud to Edge: Benchmarking LLM Inference On Hardware-Accelerated Single-Board Computers Data-Free Contribution Estimation in Federated Learning using Gradient von Neumann Entropy Shard the Gradient, Scale the Model: Serverless Federated Aggregation via Gradient Partitioning Promoting Simple Agents: Ensemble Methods for Event-Log Prediction GraphLeap: Decoupling Graph Construction and Convolution for Vision GNN Acceleration on FPGA AGNT2: Autonomous Agent Economies on Interaction-Optimized Layer 2 Infrastructure FedSIR: Spectral Client Identification and Relabeling for Federated Learning with Noisy Labels Stream-CQSA: Avoiding Out-of-Memory in Attention Computation via Flexible Workload Scheduling A Delta-Aware Orchestration Framework for Scalable Multi-Agent Edge Computing Federated Learning over Blockchain-Enabled Cloud Infrastructure Optimal Routing for Federated Learning over Dynamic Satellite Networks: Tractable or Not? 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Dimensional Misalignment in Compressed LLMs veScale-FSDP: Flexible and High-Performance FSDP at Scale AEG: A Baremetal Framework for AI Acceleration via Direct Hardware Access in Heterogeneous Accelerators ACE-Bench: A Lightweight Benchmark for Evaluating Azure SDK Usage Correctness StreamServe: Adaptive Speculative Flows for Low-Latency Disaggregated LLM Serving Emergent Social Structures in Autonomous AI Agent Networks: A Metadata Analysis of 626 Agents on the Pilot Protocol SPEED-Bench: A Unified and Diverse Benchmark for Speculative Decoding Para-B&B: Load-Balanced Deterministic Parallelization of Solving MIP Rashomon Sets and Model Multiplicity in Federated Learning Characterizing WebGPU Dispatch Overhead for LLM Inference Across Four GPU Vendors, Three Backends, and Three Browsers Scalable Explainability-as-a-Service (XaaS) for Edge AI Systems NPU Design for Diffusion Language Model Inference PRAXIS: Integrating Program Analysis with Observability for Root-Cause Analysis BitFlipScope: Scalable Fault Localization and Recovery for Bit-Flip Corruptions in LLMs Cornfigurator: Automated Planning for Any-to-Any Multimodal Model Serving SHARe-KAN: Post-Training Vector Quantization for Cache-Resident KAN Inference Spira: Exploiting Voxel Data Structural Properties for Efficient Sparse Convolution in Point Cloud Networks Power to the Clients: Federated Learning in a Dictatorship Setting From Tokens to Layers: Redefining Stall-Free Scheduling for MoE Serving with Layered Prefill Speculative Actions: A Lossless Framework for Faster Agentic Systems InfiniPipe: Elastic Pipeline Parallelism for Efficient Variable-Length Long-Context LLM Training DPQuant: Efficient and Differentially-Private Model Training via Dynamic Quantization Scheduling HFX: Joint Design of Algorithms and Systems for Multi-SLO Serving and Fast Scaling Reliable Microservice Tail Latency Prediction via Decoupled Dual-Stream Learning and Gradient Modulation On the Surprising Effectiveness of a Single Global Merging in Decentralized Learning FedRef: Bayesian Fine-Tuning using a Reference Model to Mitigate Catastrophic Forgetting for Heterogeneous Federated Learning Sandwich: Joint Configuration Search and Hot-Switching for Efficient CPU LLM Serving MegaScale-Data: Scaling Dataloader for Multisource Large Foundation Model Training RESFL: An Uncertainty-Aware Framework for Responsible Federated Learning by Balancing Privacy, Fairness and Utility BatchLLM: Optimizing Large Batched LLM Inference with Global Prefix Sharing and Throughput-oriented Token Batching Deep Optimizer States: Towards Scalable Training of Transformer Models Using Interleaved Offloading CoreGuard: Safeguarding Foundational Capabilities of LLMs Against Model Stealing in Edge Deployment Cloudless-Training: A Framework to Improve Efficiency of Geo-Distributed ML Training
Energy Efficiency Features of the Intel Skylake-SP Processor and Their Impact on Performance
Robert Schöne, Thomas Ilsche, Mario Bielert, Andreas Gocht, Dani · 2019-05-28 · via cs.DC updates on arXiv.org

The overwhelming majority of High Performance Computing (HPC) systems and server infrastructure uses Intel x86 processors. This makes an architectural analysis of these processors relevant for a wide audience of administrators and performance engineers. In this paper, we describe the effects of hardware controlled energy efficiency features for the Intel Skylake-SP processor. Due to the prolonged micro-architecture cycles, which extend the previous Tick-Tock scheme by Intel, our findings will also be relevant for succeeding architectures. The findings of this paper include the following: C-state latencies increased significantly over the Haswell-EP processor generation. The mechanism that controls the uncore frequency has a latency of approximately 10 ms and it is not possible to truly fix the uncore frequency to a specific level. The out-of-order throttling for workloads using 512 bit wide vectors also occurs at low processor frequencies. Data has a significant impact on processor power consumption which causes a large error in energy models relying only on instructions.

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