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Semantic Non-Assembly: Privacy by Architectural Inertness Under Component Exposure
[Submitted on 21 Jun 2026] · 2026-06-23 · via cs.DC updates on arXiv.org

Computer Science > Cryptography and Security

arXiv:2606.22311 (cs)

[Submitted on 21 Jun 2026]

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Abstract:Existing privacy frameworks emphasize confidentiality, access control, appropriate information flow, or statistical disclosure limitation. We introduce a complementary class of privacy guarantee (Semantic Non-Assembly) in which privacy is characterized not by the difficulty of achieving exposure but by the information yield of exposure when it occurs. SNA prevents evaluation of a designated predicate by preventing any sub-threshold coalition from assembling a sufficient assignment to its input domain. An architecture satisfies Semantic Non-Assembly when no coalition of fewer than a defined threshold of components can assemble such an assignment: complete exposure and decryption of any sub-threshold component yields no actionable data. In the base protocol, the guarantee is structural: it operates through architecture, not policy, and its privacy properties degrade predictably under component compromise rather than collapsing at a single point. The reference instantiation combines this structural guarantee with audited organizational constraints, as characterized in Appendix A. This paper formalizes the guarantee and establishes four ProVerif-verified properties: Device Non-Correlation, Registry Observer Non-Identification, Submission Server Blindness, and Active Defense Gate correctness, the first three through a two-channel provenance architecture. The Birthmark Standard instantiates the guarantee on constrained capture hardware, demonstrating deployability where ZK-based approaches are computationally infeasible. All formal properties and scope limitations are documented in Appendix A.
Comments: 31 pages, 2 figures. Submitted to ACM Transactions on Privacy and Security
Subjects: Cryptography and Security (cs.CR); Computers and Society (cs.CY); Distributed, Parallel, and Cluster Computing (cs.DC)
ACM classes: E.3; C.2.0; K.6.5
Cite as: arXiv:2606.22311 [cs.CR]
  (or arXiv:2606.22311v1 [cs.CR] for this version)
  https://doi.org/10.48550/arXiv.2606.22311

arXiv-issued DOI via DataCite (pending registration)

Submission history

From: Samuel Ryan [view email]
[v1] Sun, 21 Jun 2026 02:40:29 UTC (788 KB)

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