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Agentic Coding 2025 AI 使用总结 27 lines of code for LLM inference Tiling in AI Compilation - From Theory to Hardware Acceleration Comprehensive Cerebras Note 1 - Go From A Simple Example WaferLLM:分布式 AI 系统的循环与突破 Breaking the GPU Paradigm - A Systems Thinker's Guide to Wafer Scale Computing Breaking the GPU Paradigm - A Systems Thinker's Guide to Wafer Scale Computing AI Industry Comprehensive Analysis - June 2025 State of Development Modern LLM and VLM Training Methods - Comprehensive 2025 Guide Tenstorrent GraySkull Note Lanno Version 1 Lanno 正式版本发布 深深梦几许,猎猎青云中 —— DeepSeek 和无意义的变革 大道求索,无问西东 - 从 DeepSeek 看 MLSys 的 2025 DeepRead 开发笔记 2D Mesh QA Fake empty data generator O2H auto publish 从 2024 Google IO 看下一场竞争
Brief AI Accelerator History
Chivier Humber · 2025-01-17 · via Chivier's Blog

1990s: Early Exploration and Research

  • 1990, Intel ETANN 80170NX, Intel: Intel introduced the ETANN 80170NX, one of the first digital signal processors (DSPs) designed to accelerate artificial neural networks (ANNs). This chip utilized analog circuits to compute neural functions, marking an early attempt at specialized AI hardware.
  • 1993, Nestor/Intel Ni1000, Nestor and Intel: The Ni1000 was an all-digital chip developed by Nestor and Intel, designed to accelerate pattern recognition tasks. It represented a shift from analog to digital implementations in AI hardware.
  • 1993, DSP32 Accelerator, Digital Equipment Corporation (DEC): DEC developed the DSP32 accelerator, a digital signal processor used to accelerate optical character recognition (OCR) software. This application demonstrated the potential of DSPs in AI-related tasks.
  • 1994, Connection Machine CM-5, Thinking Machines Corporation: The CM-5 was a massively parallel supercomputer designed for AI applications, including machine learning and data mining. It featured thousands of processing elements, enabling high-speed computations for complex AI tasks.
  • 1995, Intel Paragon XP/S, Intel: The Paragon XP/S was a scalable parallel supercomputer system developed by Intel, used for AI research and applications. It supported a range of AI workloads, including simulations and data analysis.
  • 1997, IBM Deep Blue, IBM: IBM’s Deep Blue was a supercomputer designed to play chess at a high level. It famously defeated world champion Garry Kasparov, showcasing the potential of specialized hardware in AI applications.

2000s: Foundations of Modern AI Hardware

  • 2001, Intel Itanium Processor, Intel: The Itanium processor was designed for high-performance computing tasks, including AI applications. Its architecture supported parallel processing, beneficial for AI workloads.
  • 2002, IBM Blue Gene, IBM: The Blue Gene series was developed as a family of supercomputers capable of high-performance computing tasks, including AI simulations and data analysis.
  • 2006, AGEIA PhysX PPU, AGEIA Technologies: AGEIA introduced the PhysX Physics Processing Unit (PPU), designed to offload physics calculations from the CPU and GPU. While primarily aimed at gaming, its architecture demonstrated the potential for specialized processors in handling complex computations.
  • 2008, Intel Larrabee, Intel: Intel announced the Larrabee project, aiming to develop a many-core processor architecture suitable for high-performance computing tasks, including AI. Although Larrabee did not achieve commercial success, it influenced future AI accelerator designs.
  • 2009, NVIDIA Tesla C1060, NVIDIA: NVIDIA’s Tesla C1060 was a GPU designed for general-purpose computing, including AI applications. It featured CUDA architecture, allowing developers to write software that could run on the GPU, significantly accelerating AI computations.

2010s: Rise of AI Accelerators

  • 2010, Intel Xeon Processor 7500 Series, Intel: Intel introduced the Xeon Processor 7500 Series, designed for high-performance computing tasks, including AI applications. It featured multiple cores and supported parallel processing, beneficial for AI workloads.
  • 2011, NVIDIA Tesla K20, NVIDIA: NVIDIA launched the Tesla K20 GPU, based on the Kepler architecture, offering enhanced performance for AI and deep learning applications. It featured CUDA cores optimized for parallel processing tasks.
  • 2012, NVIDIA Tesla K40, NVIDIA: NVIDIA released the Tesla K40 GPU, providing increased memory capacity and computational power, further advancing AI and machine learning capabilities.
  • 2013, Intel Xeon Phi, Intel: Intel introduced the Xeon Phi, a co-processor designed for high-performance computing tasks, including AI. It featured a large number of cores and supported parallel processing, beneficial for AI workloads.
  • 2014, NVIDIA Tesla K80, NVIDIA: NVIDIA launched the Tesla K80 GPU, featuring dual GPUs and increased memory bandwidth, designed to accelerate AI and deep learning applications.
  • 2015, Google TPUv1, Google: Google unveiled the Tensor Processing Unit (TPU), an application-specific integrated circuit (ASIC) designed to accelerate neural network machine learning. The TPU was developed to enhance the performance and efficiency of AI workloads.
  • 2016, Tesla P100, NVIDIA: NVIDIA launched the Tesla P100 GPU, based on the Pascal architecture, offering substantial improvements in AI and deep learning performance.
  • 2017, TPUv2, Google: Google unveiled the second generation of TPUs, enhancing performance and efficiency for AI workloads.
  • 2018, Tesla V100, NVIDIA: NVIDIA released the Tesla V100 GPU, utilizing the Volta architecture, further advancing AI and deep learning capabilities.
  • 2019, TPUv3, Google: Google introduced the third generation of TPUs, providing even greater performance for AI applications.

2020s: Modern AI Hardware Innovations

  • 2020, A100, NVIDIA: NVIDIA launched the A100 GPU, based on the Ampere architecture, delivering significant advancements in AI and ML performance.
  • 2020, Apple M1 Chip, Apple: Apple introduced the M1 chip, a system-on-a-chip (SoC) designed for Mac computers and later integrated into other devices like the iPad Pro. The M1 features an 8-core CPU, 8-core GPU, and a 16-core Neural Engine, capable of 11 TOPS (Tera Operations Per Second), enhancing machine learning tasks and energy efficiency.
  • 2021, Cerebras Wafer-Scale Engine 2 (WSE-2), Cerebras Systems: Cerebras unveiled the WSE-2, the largest AI chip to date, designed to accelerate deep learning models. The WSE-2 offers unprecedented computational density, enabling faster training times for complex neural networks.
  • 2022, Graphcore IPU-POD64, Graphcore: Graphcore introduced the IPU-POD64, a system comprising 64 Intelligence Processing Units (IPUs) aimed at accelerating AI workloads. This architecture provides high parallelism and efficient data handling, optimizing performance for various AI applications.
  • 2023, TPUv4, Google: Google released the fourth generation of TPUs, offering enhanced performance and efficiency for AI tasks. TPUv4 integrates advanced tensor processing capabilities, supporting larger and more complex neural networks.
  • 2024, Broadcom and Marvell AI ASICs, Broadcom and Marvell Technology: Broadcom and Marvell announced custom AI ASICs, providing cost-effective solutions for AI processing needs. These ASICs are designed to offer high performance while maintaining energy efficiency, catering to a wide range of AI applications.
  • 2024, Tesla Dojo Supercomputer, Tesla: Tesla’s Dojo supercomputer, powered by D1 chips, is designed to enhance AI training for autonomous driving. It features a scalable architecture that can deploy multiple ExaPODs, enabling the processing of vast amounts of data required for training sophisticated neural networks.
  • 2024, Tenstorrent Grayskull e75 and e150, Tenstorrent: Tenstorrent unveiled the Grayskull™ e75 and e150 AI accelerators, built with Tensix Cores. These processors are designed for efficient data movement and AI workloads, featuring a compute unit, network-on-chip, local cache, and “baby RISC-V” cores to optimize processing efficiency.
  • 2024, Apple M2 Chip, Apple: Building on the success of the M1, Apple introduced the M2 chip, enhancing AI capabilities with a more powerful Neural Engine capable of 15 TOPS. The M2 offers improved performance and efficiency for AI-driven applications across Apple’s device lineup.
  • 2024, NVIDIA H100 GPU, NVIDIA: NVIDIA launched the H100 GPU, based on the Hopper architecture, specifically optimized for large-scale AI training and inference tasks. The H100 provides significant improvements in computational power and energy efficiency, supporting cutting-edge AI research and deployment.
  • 2024, AMD Instinct MI300, AMD: AMD introduced the Instinct MI300, a GPU designed for AI and high-performance computing. Featuring advanced machine learning optimizations and increased memory bandwidth, the MI300 aims to compete with leading AI accelerators in the market.
  • 2024, GB200 NVL72, NVIDIA: NVIDIA introduced the GB200 NVL72, a high-performance chip designed to optimize deep learning and large-scale AI model training tasks. The chip features advanced architecture for accelerating neural network operations.
  • 2024, GB200 NVL4, NVIDIA: NVIDIA unveiled the GB200 NVL4, a new AI accelerator chip offering optimized performance for edge AI applications and real-time inference tasks. The chip is designed for scalable, low-latency AI processing.
  • 2024, GB10 Grace Blackwell Superchip, NVIDIA: The GB10 Grace Blackwell Superchip from NVIDIA combines powerful CPU and GPU architectures, designed to handle both AI training and inference tasks. This chip aims to deliver high efficiency in both AI workloads and traditional computing tasks.
timeline
    title AI Accelerator Timeline: Early Era (1990-2009)
    1990 : Intel ETANN 80170NX [1990, Intel]
    1993 : Nestor/Intel Ni1000 [1993, Nestor & Intel]
          : DSP32 Accelerator [1993, DEC]
          : Connection Machine CM-5 [1994, Thinking Machines]
    1995 : Intel Paragon XP/S [1995, Intel]
          : IBM Deep Blue [1997, IBM]
    2001 : Intel Itanium [2001, Intel]
          : IBM Blue Gene [2002, IBM]
          : AGEIA PhysX PPU [2006, AGEIA]
    2008 : Intel Larrabee [2008, Intel]
          : NVIDIA Tesla C1060 [2009, NVIDIA]

1990s: Early Exploration and Research

  • Focus on specialized processors for AI tasks, transitioning from analog to digital.
  • Introduction of DSPs (Digital Signal Processors) like Intel ETANN for neural network computations.
  • Early parallel computing efforts with supercomputers like Connection Machine CM-5 and IBM Deep Blue for AI applications.

2000s: Foundations of Modern AI Hardware

  • Emergence of high-performance computing systems (e.g., Intel Itanium, IBM Blue Gene) for AI simulations.
  • Introduction of general-purpose GPUs like NVIDIA’s Tesla C1060, marking the start of GPU involvement in AI.

2010s: Rise of AI Accelerators

  • Shift toward dedicated AI accelerators like Google’s Tensor Processing Units (TPUs) for deep learning tasks.
  • NVIDIA’s GPUs (e.g., Tesla K80, P100) gaining prominence for AI and machine learning acceleration.
  • Multi-core processors and parallel processing became key features for AI workloads (e.g., Intel Xeon Phi, NVIDIA Tesla series).

2020s: Modern AI Hardware Innovations

  • Surge in custom AI chips such as Cerebras WSE-2 and Graphcore IPU-POD64, offering massive computational power and efficiency for deep learning.
  • Integration of AI hardware in consumer devices, exemplified by Apple’s M1 and M2 chips with Neural Engines for ML tasks.
  • Specialized chips for large-scale AI models (e.g., NVIDIA H100, Broadcom/Marvell AI ASICs) focusing on performance and energy efficiency.
  • Introduction of supercomputers like Tesla’s Dojo, dedicated to autonomous driving AI training.
  • Transition from general-purpose CPUs to specialized AI chips (ASICs, GPUs).
  • Focus on parallelism and scalability for complex AI tasks.
  • Rise of energy-efficient AI accelerators.
  • Increasing role of edge AI with chips designed for real-time, low-latency tasks.