AMD has published early performance data for its next-generation EPYC processor family, codenamed Venice. The new server CPU generation is based on the Zen 6 architecture and a 2nm-class process node, with AMD using a 256-core configuration to demonstrate rack-level performance scaling under a fixed 100kW power budget. Rather than presenting only a conventional single-processor benchmark, AMD compares complete rack-level throughput. The test uses SPEC CPU 2017 and normalizes NVIDIA Vera to a baseline score of 1.0. In AMD’s data, Intel Xeon 6980P reaches 1.46, the current-generation EPYC Turin platform reaches 2.37, and the upcoming 256-core EPYC Venice platform reaches 3.30.

That result puts Venice at more than three times the rack-level performance of NVIDIA Vera and more than twice the result of Intel Xeon 6980P within the same 100kW rack limit. AMD’s point is that large data center deployments are often constrained by power, cooling, and rack density rather than only by the maximum performance of a single processor.

The comparison is not a direct core-for-core test. The Venice configuration used by AMD has 256 cores, while EPYC Turin has 192 cores, Intel Xeon 6980P has 128 cores, and NVIDIA Vera has 88 cores. That gives Venice a significant core-density advantage, which is central to the result. Even so, the numbers provide an early indication of how AMD intends to position Zen 6 EPYC in high-density server environments.

AMD also showed single-core SPEC CPU 2017 data. Using Vera as the reference point, the 256-core Venice processor shows a 27% average single-core advantage. For a 96-core Venice configuration, the advantage is listed at 11%. This suggests that Venice is not only relying on higher core count, but that the larger configuration may also benefit from platform tuning, power behavior, or frequency characteristics suited to rack-scale workloads. The broader message is that AMD wants server buyers to evaluate performance by deployable compute per rack. For cloud providers, hosting companies, HPC clusters, and enterprise data centers, this metric can matter more than isolated CPU peak performance. More independent testing will be needed once Venice systems are available, but AMD’s first figures suggest a substantial throughput increase over current-generation platforms when measured under a fixed rack power envelope.

Source: AMD