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Power-Integrity Modeling of VR Faults in High-Performance Applications
Sriharini Kr · 2026-05-26 · via cs updates on arXiv.org

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Abstract:Distributed vertical power delivery has emerged as a promising approach to meet aggressive current-density, efficiency, and transient response requirements in high-performance computing systems. Tight integration of voltage regulators within stacked substrates, however, increases the vulnerability of the power delivery system to short-circuit and open-circuit faults arising from elevated thermal and mechanical stresses. Such faults can propagate through the shared power delivery network, leading to rapid degradation of system-wide efficiency at worst-case rates of up to 0.5% per microsecond. Advanced fault-tolerant power management strategies are therefore required to ensure efficient power delivery. A real-time fault-detection and isolation methodology are proposed in this paper for vertical power delivery systems. The methodology is developed based on an analytical inductor-current models that rely solely on signals available within the converter control circuitry, thereby eliminating additional sensing overhead. The proposed framework is designed and simulated in SPICE environment, demonstrating sub-microsecond fault detection and effective dual-fuse isolation, maintaining uninterrupted power delivery with a system-wide efficiency degradation of less than 2%.
Subjects: Systems and Control (eess.SY)
Cite as: arXiv:2605.24877 [eess.SY]
  (or arXiv:2605.24877v1 [eess.SY] for this version)
  https://doi.org/10.48550/arXiv.2605.24877

arXiv-issued DOI via DataCite (pending registration)

Submission history

From: Sriharini Krishnakumar [view email]
[v1] Sun, 24 May 2026 05:39:31 UTC (928 KB)