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cs.CV updates on arXiv.org

ClawGUI: A Unified Framework for Training, Evaluating, and Deploying GUI Agents On the Robustness of Watermarking for Autoregressive Image Generation Revisiting Compositionality in Dual-Encoder Vision-Language Models: The Role of Inference Anthropogenic Regional Adaptation in Multimodal Vision-Language Model From Redaction to Restoration: Deep Learning for Medical Image Anonymization and Reconstruction The Salami Slicing Threat: Exploiting Cumulative Risks in LLM Systems BoxTuning: Directly Injecting the Object Box for Multimodal Model Fine-Tuning Semantic-Geometric Dual Compression: Training-Free Visual Token Reduction for Ultra-High-Resolution Remote Sensing Understanding Lightweight Low-Light Image Enhancement via Distribution-Normalizing Preprocessing and Depthwise U-Net Back to the Barn with LLAMAs: Evolving Pretrained LLM Backbones in Finetuning Vision Language Models Pseudo-Unification: Entropy Probing Reveals Divergent Information Patterns in Unified Multimodal Models QShield: Securing Neural Networks Against Adversarial Attacks using Quantum Circuits Evaluating the Impact of Medical Image Reconstruction on Downstream AI Fairness and Performance Retinal Cyst Detection from Optical Coherence Tomography Images LoViF 2026 The First Challenge on Weather Removal in Videos STORM: End-to-End Referring Multi-Object Tracking in Videos Data-Efficient Surgical Phase Segmentation in Small-Incision Cataract Surgery: A Controlled Study of Vision Foundation Models Rethinking the Diffusion Model from a Langevin Perspective Zero-shot World Models Are Developmentally Efficient Learners Edu-MMBias: A Three-Tier Multimodal Benchmark for Auditing Social Bias in Vision-Language Models under Educational Contexts VGA-Bench: A Unified Benchmark and Multi-Model Framework for Video Aesthetics and Generation Quality Evaluation Degradation-Consistent Paired Training for Robust AI-Generated Image Detection FREE-Switch: Frequency-based Dynamic LoRA Switch for Style Transfer Demographic and Linguistic Bias Evaluation in Omnimodal Language Models FlowPalm: Optical Flow Driven Non-Rigid Deformation for Geometrically Diverse Palmprint Generation Cross-Cultural Value Awareness in Large Vision-Language Models I Walk the Line: Examining the Role of Gestalt Continuity in Object Binding for Vision Transformers GLEaN: A Text-to-image Bias Detection Approach for Public Comprehension From UAV Imagery to Agronomic Reasoning: A Multimodal LLM Benchmark for Plant Phenotyping Not Your Stereo-Typical Estimator: Combining Vision and Language for Volume Perception
SPARX: Secure and Privacy-Aware Approximate CNN Accelerat...
Sonu Kumar, Akash Sankhe, Mukul Lokhande, Santosh Kumar Vishvaka · 2026-06-08 · via cs.CV updates on arXiv.org

Edge-AI systems increasingly require real-time CNN inference under strict energy, performance, security, and privacy constraints. Approximate computing improves hardware efficiency by exploiting the error resilience of neural network workloads; however, most approximate CNN accelerators do not jointly consider secure, privacy-aware edge deployment. This paper presents SPARX, a Secure and Privacy-Aware Approximate CNN Acceleration framework integrated within a heterogeneous RV32IMC RISC-V System-on-Chip (SoC). SPARX combines a custom RISC-V instruction extension, an approximate logarithmic CNN acceleration unit, a lightweight differential-noise-based privacy engine, and a challenge-response authentication mechanism. To guide arithmetic selection, an approximation-aware decision framework is introduced that uses the Approximation Severity Index (ASI), Approximation Efficiency (AE), Quality of Approximation (QoA), Approximation Figure-of-Merit (AFOM), and Hardware Acceleration Efficiency (HAE). Evaluation across 11 state-of-the-art approximate MAC architectures identifies the Iterative Logarithmic Multiplier (ILM) as the most suitable design, achieving 51.7% area reduction, 81.5% power reduction, and 2.13x throughput improvement compared with an accurate radix-4 Booth MAC, while only reducing ResNet-20/CIFAR-10 accuracy by 2.82 percentage points. FPGA implementation on a Xilinx VC707 platform achieves 58.4 GOPS/W energy efficiency at 250 MHz, while 28-nm CMOS physical implementation validates ASIC feasibility